The code wrapped in '#ifdef PREBOOT_SUPPORT' was added for
queue context initialization specifically for A0 silicon.
As A0 silicon has gone for a long time, the code should be
removed at all. In addition, the checks of 'QV_RELEASE'
and 'PREBOOT_SUPPORT' are also not needed anymore and can
be removed.
Signed-off-by: Helin Zhang <helin.zhang at intel.com>
Reviewed-by: Chen Jing <jing.d.chen at intel.com>
---
lib/librte_pmd_i40e/i40e/i40e_common.c | 3 -
lib/librte_pmd_i40e/i40e/i40e_lan_hmc.c | 203 --------------------------------
lib/librte_pmd_i40e/i40e/i40e_lan_hmc.h | 13 --
3 files changed, 219 deletions(-)
diff --git a/lib/librte_pmd_i40e/i40e/i40e_common.c
b/lib/librte_pmd_i40e/i40e/i40e_common.c
index 6cdc0ff..4254aad 100644
--- a/lib/librte_pmd_i40e/i40e/i40e_common.c
+++ b/lib/librte_pmd_i40e/i40e/i40e_common.c
@@ -922,11 +922,8 @@ enum i40e_status_code i40e_pf_reset(struct i40e_hw *hw)
}
}
-#if !defined(QV_RELEASE) && !defined(PREBOOT_SUPPORT)
i40e_clear_pxe_mode(hw);
-#endif
-
return I40E_SUCCESS;
}
diff --git a/lib/librte_pmd_i40e/i40e/i40e_lan_hmc.c
b/lib/librte_pmd_i40e/i40e/i40e_lan_hmc.c
index d5e7d44..9f98d6d 100644
--- a/lib/librte_pmd_i40e/i40e/i40e_lan_hmc.c
+++ b/lib/librte_pmd_i40e/i40e/i40e_lan_hmc.c
@@ -1411,206 +1411,3 @@ enum i40e_status_code
i40e_set_lan_rx_queue_context(struct i40e_hw *hw,
return i40e_set_hmc_context(context_bytes,
i40e_hmc_rxq_ce_info, (u8 *)s);
}
-#ifdef PREBOOT_SUPPORT
-
-/* Definitions for PFM bypass registers */
-
-/* Each context sub-line consists of 128 bits (16 bytes) of data*/
-#define SUB_LINE_LENGTH 0x10
-
-#define LANCTXCTL_WR 0x1
-#define LANCTXCTL_INVALIDATE 0x2
-#define LANCTXCTL_QUEUE_TYPE_TX 0x1
-#define LANCTXCTL_QUEUE_TYPE_RX 0x0
-
-#define LANCTXSTAT_DELAY 100
-
-/**
- * i40e_write_queue_context_directly
- * @hw: the hardware struct
- * @queue: the absolute queue number
- * @context_bytes: data to write as a queue context
- * @hmc_type: queue type
- *
- * Write the HMC context for the queue using direct queue context programming
- **/
-static enum i40e_status_code i40e_write_queue_context_directly(struct i40e_hw
*hw,
- u16 queue, u8 *context_bytes,
- enum i40e_hmc_lan_rsrc_type hmc_type)
-{
- u32 length = 0;
- u32 queue_type = 0;
- u32 sub_line = 0;
- u32 i = 0;
- u32 cnt = 0;
- u32 *ptr = NULL;
- enum i40e_status_code ret_code = I40E_SUCCESS;
-
- switch (hmc_type) {
- case I40E_HMC_LAN_RX:
- length = I40E_HMC_OBJ_SIZE_RXQ;
- queue_type = LANCTXCTL_QUEUE_TYPE_RX;
- break;
- case I40E_HMC_LAN_TX:
- length = I40E_HMC_OBJ_SIZE_TXQ;
- queue_type = LANCTXCTL_QUEUE_TYPE_TX;
- break;
- default:
- return I40E_NOT_SUPPORTED;
- }
-
- ptr = (u32 *)context_bytes;
-
- for (sub_line = 0; sub_line < (length / SUB_LINE_LENGTH); sub_line++) {
- u32 reg;
-
- for (i = 0; i < 4; i++)
- wr32(hw, I40E_PFCM_LANCTXDATA(i), *ptr++);
- reg = (LANCTXCTL_WR << I40E_PFCM_LANCTXCTL_OP_CODE_SHIFT) |
- (queue_type << I40E_PFCM_LANCTXCTL_QUEUE_TYPE_SHIFT) |
- (sub_line << I40E_PFCM_LANCTXCTL_SUB_LINE_SHIFT) |
- (queue << I40E_PFCM_LANCTXCTL_QUEUE_NUM_SHIFT);
- wr32(hw, I40E_PFCM_LANCTXCTL, reg);
-
- cnt = 0;
- while (cnt++ <= LANCTXSTAT_DELAY) {
- reg = rd32(hw, I40E_PFCM_LANCTXSTAT);
- if (reg)
- break;
- i40e_usec_delay(1);
- };
-
- if ((reg & I40E_PFCM_LANCTXSTAT_CTX_DONE_MASK) == 0) {
- ret_code = I40E_ERR_CONFIG;
- break;
- }
- }
- return ret_code;
-}
-
-/**
- * i40e_invalidate_queue_context_directly
- * @hw: the hardware struct
- * @queue: the absolute queue number
- * @hmc_type: queue type
- *
- * Clear the HMC context for the queue using direct queue context programming
- **/
-static enum i40e_status_code i40e_invalidate_queue_context_directly(struct
i40e_hw *hw,
- u16 queue,
- enum i40e_hmc_lan_rsrc_type hmc_type)
-{
- u8 queue_type = 0;
- u32 reg = 0;
- u32 cnt = 0;
- enum i40e_status_code ret_code = I40E_SUCCESS;
-
- switch (hmc_type) {
- case I40E_HMC_LAN_RX:
- queue_type = LANCTXCTL_QUEUE_TYPE_RX;
- break;
- case I40E_HMC_LAN_TX:
- queue_type = LANCTXCTL_QUEUE_TYPE_TX;
- break;
- default:
- return I40E_NOT_SUPPORTED;
- }
- reg = (LANCTXCTL_INVALIDATE << I40E_PFCM_LANCTXCTL_OP_CODE_SHIFT) |
- (queue_type << I40E_PFCM_LANCTXCTL_QUEUE_TYPE_SHIFT) |
- (queue << I40E_PFCM_LANCTXCTL_QUEUE_NUM_SHIFT);
- wr32(hw, I40E_PFCM_LANCTXCTL, reg);
- while (cnt++ <= LANCTXSTAT_DELAY) {
- reg = rd32(hw, I40E_PFCM_LANCTXSTAT);
- if (reg)
- break;
- i40e_usec_delay(1);
- };
-
- if (reg != I40E_PFCM_LANCTXSTAT_CTX_DONE_MASK)
- ret_code = I40E_ERR_CONFIG;
-
- return ret_code;
-}
-
-/**
- * i40e_clear_lan_tx_queue_context_directly
- * @hw: the hardware struct
- * @queue: the absolute queue number
- *
- * Clear the HMC context for the Tx queue using direct queue context
programming
- **/
-enum i40e_status_code i40e_clear_lan_tx_queue_context_directly(
- struct i40e_hw *hw, u16 queue)
-{
- return i40e_invalidate_queue_context_directly(hw, queue,
- I40E_HMC_LAN_TX);
-}
-
-/**
- * i40e_set_lan_tx_queue_context_directly
- * @hw: the hardware struct
- * @queue: the absolute queue number
- * @s: the struct to be filled
- *
- * Prepare and set the HMC context for the Tx queue
- * using direct queue context programming
- **/
-enum i40e_status_code i40e_set_lan_tx_queue_context_directly(struct i40e_hw
*hw,
- u16 queue, struct i40e_hmc_obj_txq *s)
-{
- enum i40e_status_code status;
- u8 context_bytes[I40E_HMC_OBJ_SIZE_TXQ];
-
- /* Zero out context bytes */
- i40e_memset(context_bytes, 0, I40E_HMC_OBJ_SIZE_TXQ, I40E_DMA_MEM);
-
- status = i40e_set_hmc_context(context_bytes, i40e_hmc_txq_ce_info,
- (u8 *)s);
- if (status)
- return status;
-
- return i40e_write_queue_context_directly(hw, queue, context_bytes,
- I40E_HMC_LAN_TX);
-}
-
-/**
- * i40e_clear_lan_rx_queue_context_directly
- * @hw: the hardware struct
- * @queue: the absolute queue number
- *
- * Clear the HMC context for the Rx queue using direct queue context
programming
- **/
-enum i40e_status_code i40e_clear_lan_rx_queue_context_directly(struct i40e_hw
*hw,
- u16 queue)
-{
- return i40e_invalidate_queue_context_directly(hw, queue,
- I40E_HMC_LAN_RX);
-}
-
-/**
- * i40e_set_lan_rx_queue_context_directly
- * @hw: the hardware struct
- * @queue: the queue we care about
- * @s: the struct to be filled
- *
- * Prepare and set the HMC context for the Rx queue
- * using direct queue context programming
- **/
-enum i40e_status_code i40e_set_lan_rx_queue_context_directly(struct i40e_hw
*hw,
- u16 queue, struct i40e_hmc_obj_rxq *s)
-{
- enum i40e_status_code status;
- u8 context_bytes[I40E_HMC_OBJ_SIZE_RXQ];
-
- /* Zero out context bytes */
- i40e_memset(context_bytes, 0, I40E_HMC_OBJ_SIZE_RXQ, I40E_DMA_MEM);
-
- status = i40e_set_hmc_context(context_bytes, i40e_hmc_rxq_ce_info,
- (u8 *)s);
- if (status)
- return status;
-
- return i40e_write_queue_context_directly(hw, queue, context_bytes,
- I40E_HMC_LAN_RX);
-}
-#endif /* PREBOOT_SUPPORT */
diff --git a/lib/librte_pmd_i40e/i40e/i40e_lan_hmc.h
b/lib/librte_pmd_i40e/i40e/i40e_lan_hmc.h
index f4fa23a..f0f0f89 100644
--- a/lib/librte_pmd_i40e/i40e/i40e_lan_hmc.h
+++ b/lib/librte_pmd_i40e/i40e/i40e_lan_hmc.h
@@ -193,19 +193,6 @@ enum i40e_status_code
i40e_clear_lan_rx_queue_context(struct i40e_hw *hw,
enum i40e_status_code i40e_set_lan_rx_queue_context(struct i40e_hw *hw,
u16 queue,
struct i40e_hmc_obj_rxq *s);
-#ifdef PREBOOT_SUPPORT
-
-enum i40e_status_code i40e_clear_lan_tx_queue_context_directly(struct i40e_hw
*hw,
- u16 queue);
-enum i40e_status_code i40e_set_lan_tx_queue_context_directly(struct i40e_hw
*hw,
- u16 queue,
- struct i40e_hmc_obj_txq *s);
-enum i40e_status_code i40e_clear_lan_rx_queue_context_directly(struct i40e_hw
*hw,
- u16 queue);
-enum i40e_status_code i40e_set_lan_rx_queue_context_directly(struct i40e_hw
*hw,
- u16 queue,
- struct i40e_hmc_obj_rxq *s);
-#endif
enum i40e_status_code i40e_create_lan_hmc_object(struct i40e_hw *hw,
struct i40e_hmc_lan_create_obj_info *info);
enum i40e_status_code i40e_delete_lan_hmc_object(struct i40e_hw *hw,
--
1.8.1.4
