As ethdev has been changed to support multiple sizes of
reta, updating/querying reta should be reworked to support
that change.
v2 changes:
* Put rework of updating/querying igb reta to a single patch.
Signed-off-by: Helin Zhang <helin.zhang at intel.com>
Reviewed-by: Jijiang Liu <jijiang.liu at intel.com>
Reviewed-by: Cunming Liang <cunming.liang at intel.com>
Reviewed-by: Jingjing Wu <jingjing.wu at intel.com>
---
lib/librte_pmd_e1000/igb_ethdev.c | 109 ++++++++++++++++++++------------------
1 file changed, 56 insertions(+), 53 deletions(-)
diff --git a/lib/librte_pmd_e1000/igb_ethdev.c
b/lib/librte_pmd_e1000/igb_ethdev.c
index 6646029..2fd30e4 100644
--- a/lib/librte_pmd_e1000/igb_ethdev.c
+++ b/lib/librte_pmd_e1000/igb_ethdev.c
@@ -126,10 +126,11 @@ static int igbvf_vlan_filter_set(struct rte_eth_dev *dev,
static int igbvf_set_vfta(struct e1000_hw *hw, uint16_t vid, bool on);
static void igbvf_set_vfta_all(struct rte_eth_dev *dev, bool on);
static int eth_igb_rss_reta_update(struct rte_eth_dev *dev,
- struct rte_eth_rss_reta *reta_conf);
+ struct rte_eth_rss_reta_entry64 *reta_conf,
+ uint16_t reta_size);
static int eth_igb_rss_reta_query(struct rte_eth_dev *dev,
- struct rte_eth_rss_reta *reta_conf);
-
+ struct rte_eth_rss_reta_entry64 *reta_conf,
+ uint16_t reta_size);
static int eth_igb_add_syn_filter(struct rte_eth_dev *dev,
struct rte_syn_filter *filter, uint16_t rx_queue);
static int eth_igb_remove_syn_filter(struct rte_eth_dev *dev);
@@ -2250,38 +2251,39 @@ igbvf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t
vlan_id, int on)
static int
eth_igb_rss_reta_update(struct rte_eth_dev *dev,
- struct rte_eth_rss_reta *reta_conf)
+ struct rte_eth_rss_reta_entry64 *reta_conf,
+ uint16_t reta_size)
{
- uint8_t i,j,mask;
- uint32_t reta;
- struct e1000_hw *hw =
- E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ uint8_t i, j, mask;
+ uint32_t reta, r;
+ uint16_t idx, shift;
+ struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
- /*
- * Update Redirection Table RETA[n],n=0...31,The redirection table has
- * 128-entries in 32 registers
- */
- for(i = 0; i < ETH_RSS_RETA_NUM_ENTRIES; i += 4) {
- if (i < ETH_RSS_RETA_NUM_ENTRIES/2)
- mask = (uint8_t)((reta_conf->mask_lo >> i) & 0xF);
+ if (reta_size != ETH_RSS_RETA_SIZE_128) {
+ PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
+ "(%d) doesn't match the number hardware can supported "
+ "(%d)\n", reta_size, ETH_RSS_RETA_SIZE_128);
+ return -EINVAL;
+ }
+
+ for (i = 0; i < reta_size; i += 4) {
+ idx = i / RTE_BIT_WIDTH_64;
+ shift = i % RTE_BIT_WIDTH_64;
+ mask = (uint8_t)((reta_conf[idx].mask >> shift) & 0xf);
+ if (!mask)
+ continue;
+ if (mask == 0xf)
+ r = 0;
else
- mask = (uint8_t)((reta_conf->mask_hi >>
- (i - ETH_RSS_RETA_NUM_ENTRIES/2)) & 0xF);
- if (mask != 0) {
- reta = 0;
- /* If all 4 entries were set,don't need read RETA
register */
- if (mask != 0xF)
- reta = E1000_READ_REG(hw,E1000_RETA(i >> 2));
-
- for (j = 0; j < 4; j++) {
- if (mask & (0x1 << j)) {
- if (mask != 0xF)
- reta &= ~(0xFF << 8 * j);
- reta |= reta_conf->reta[i + j] << 8 * j;
- }
- }
- E1000_WRITE_REG(hw, E1000_RETA(i >> 2),reta);
+ r = E1000_READ_REG(hw, E1000_RETA(i >> 2));
+ for (j = 0, reta = 0; j < 4; j++) {
+ if (mask & (0x1 << j))
+ reta |= reta_conf[idx].reta[shift + j] <<
+ (CHAR_BIT * j);
+ else
+ reta |= r & (0xff << (CHAR_BIT * j));
}
+ E1000_WRITE_REG(hw, E1000_RETA(i >> 2), reta);
}
return 0;
@@ -2289,31 +2291,32 @@ eth_igb_rss_reta_update(struct rte_eth_dev *dev,
static int
eth_igb_rss_reta_query(struct rte_eth_dev *dev,
- struct rte_eth_rss_reta *reta_conf)
+ struct rte_eth_rss_reta_entry64 *reta_conf,
+ uint16_t reta_size)
{
- uint8_t i,j,mask;
+ uint8_t i, j, mask;
uint32_t reta;
- struct e1000_hw *hw =
- E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ uint16_t idx, shift;
+ struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
- /*
- * Read Redirection Table RETA[n],n=0...31,The redirection table has
- * 128-entries in 32 registers
- */
- for(i = 0; i < ETH_RSS_RETA_NUM_ENTRIES; i += 4) {
- if (i < ETH_RSS_RETA_NUM_ENTRIES/2)
- mask = (uint8_t)((reta_conf->mask_lo >> i) & 0xF);
- else
- mask = (uint8_t)((reta_conf->mask_hi >>
- (i - ETH_RSS_RETA_NUM_ENTRIES/2)) & 0xF);
-
- if (mask != 0) {
- reta = E1000_READ_REG(hw,E1000_RETA(i >> 2));
- for (j = 0; j < 4; j++) {
- if (mask & (0x1 << j))
- reta_conf->reta[i + j] =
- (uint8_t)((reta >> 8 * j) &
0xFF);
- }
+ if (reta_size != ETH_RSS_RETA_SIZE_128) {
+ PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
+ "(%d) doesn't match the number hardware can supported "
+ "(%d)\n", reta_size, ETH_RSS_RETA_SIZE_128);
+ return -EINVAL;
+ }
+
+ for (i = 0; i < reta_size; i += 4) {
+ idx = i / RTE_BIT_WIDTH_64;
+ shift = i % RTE_BIT_WIDTH_64;
+ mask = (uint8_t)((reta_conf[idx].mask >> shift) & 0xf);
+ if (!mask)
+ continue;
+ reta = E1000_READ_REG(hw, E1000_RETA(i >> 2));
+ for (j = 0; j < 4; j++) {
+ if (mask & (0x1 << j))
+ reta_conf[idx].reta[shift + j] =
+ ((reta >> (CHAR_BIT * j)) & 0xff);
}
}
--
1.8.1.4
