Support of Fortpark device IDs and mac types which includes FPGA
were added.
Signed-off-by: Helin Zhang <helin.zhang at intel.com>
---
lib/librte_pmd_i40e/i40e/i40e_common.c | 17 +++++++++++++++++
lib/librte_pmd_i40e/i40e/i40e_type.h | 16 ++++++++++++++++
2 files changed, 33 insertions(+)
diff --git a/lib/librte_pmd_i40e/i40e/i40e_common.c
b/lib/librte_pmd_i40e/i40e/i40e_common.c
index e7b70c9..2256de9 100644
--- a/lib/librte_pmd_i40e/i40e/i40e_common.c
+++ b/lib/librte_pmd_i40e/i40e/i40e_common.c
@@ -36,6 +36,7 @@ POSSIBILITY OF SUCH DAMAGE.
#include "i40e_prototype.h"
#include "i40e_virtchnl.h"
+
/**
* i40e_set_mac_type - Sets MAC type
* @hw: pointer to the HW structure
@@ -55,6 +56,8 @@ STATIC enum i40e_status_code i40e_set_mac_type(struct i40e_hw
*hw)
if (hw->vendor_id == I40E_INTEL_VENDOR_ID) {
switch (hw->device_id) {
+ case I40E_DEV_ID_BVL_I40Q:
+ case I40E_DEV_ID_FPGA_A:
case I40E_DEV_ID_SFP_XL710:
case I40E_DEV_ID_QEMU:
case I40E_DEV_ID_KX_A:
@@ -66,6 +69,20 @@ STATIC enum i40e_status_code i40e_set_mac_type(struct
i40e_hw *hw)
case I40E_DEV_ID_10G_BASE_T:
hw->mac.type = I40E_MAC_XL710;
break;
+ case I40E_DEV_ID_FPK_LBG_NS:
+ case I40E_DEV_ID_FPK_LBG_SD:
+ case I40E_DEV_ID_FPK_FPGA:
+ hw->mac.type = I40E_MAC_FPK;
+ break;
+ case I40E_DEV_ID_FPK_VF_LBG_NS:
+ case I40E_DEV_ID_FPK_VF_LBG_SD:
+ case I40E_DEV_ID_FPK_VF_HV_LBG_NS:
+ case I40E_DEV_ID_FPK_VF_HV_LBG_SD:
+ case I40E_DEV_ID_FPK_FPGA_VF:
+ case I40E_DEV_ID_FPK_FPGA_VF_HV:
+ hw->mac.type = I40E_MAC_FPK_VF;
+ break;
+ case I40E_DEV_ID_BVL_I40Q_VF:
case I40E_DEV_ID_VF:
case I40E_DEV_ID_VF_HV:
hw->mac.type = I40E_MAC_VF;
diff --git a/lib/librte_pmd_i40e/i40e/i40e_type.h
b/lib/librte_pmd_i40e/i40e/i40e_type.h
index 78b6a85..1565095 100644
--- a/lib/librte_pmd_i40e/i40e/i40e_type.h
+++ b/lib/librte_pmd_i40e/i40e/i40e_type.h
@@ -63,6 +63,20 @@ POSSIBILITY OF SUCH DAMAGE.
#define I40E_DEV_ID_10G_BASE_T 0x1586
#define I40E_DEV_ID_VF 0x154C
#define I40E_DEV_ID_VF_HV 0x1571
+#define I40E_DEV_ID_FPK_LBG_NS 0x374C
+#define I40E_DEV_ID_FPK_LBG_SD 0x37CC
+#define I40E_DEV_ID_FPK_VF_LBG_NS 0x374D
+#define I40E_DEV_ID_FPK_VF_LBG_SD 0x37CD
+#define I40E_DEV_ID_FPK_VF_HV_LBG_NS 0x3759
+#define I40E_DEV_ID_FPK_VF_HV_LBG_SD 0x37D9
+#define I40E_DEV_ID_FPK_FPGA 0xF0A2
+#define I40E_DEV_ID_FPK_FPGA_VF 0xF0A3
+#define I40E_DEV_ID_FPK_FPGA_VF_HV 0xF0A4
+#define I40E_DEV_ID_BVL_I40Q 0xFAFA
+#define I40E_DEV_ID_BVL_I40Q_VF 0xFAFB
+/* the A0 support needs the FPGA defines for now */
+#define I40E_DEV_ID_FPGA_A 0x154B
+#define I40E_DEV_ID_FPGA_A_VF 0x154C
#define i40e_is_40G_device(d) ((d) == I40E_DEV_ID_QSFP_A || \
(d) == I40E_DEV_ID_QSFP_B || \
@@ -194,6 +208,8 @@ enum i40e_mac_type {
I40E_MAC_X710,
I40E_MAC_XL710,
I40E_MAC_VF,
+ I40E_MAC_FPK,
+ I40E_MAC_FPK_VF,
I40E_MAC_GENERIC,
};
--
1.8.1.4
