On Wed, 2019-01-09 at 10:22 +0000, Yongseok Koh wrote: > > On Jan 9, 2019, at 2:09 AM, Jerin Jacob Kollanukkaran < > > jer...@marvell.com> wrote: > > > > On Wed, 2019-01-09 at 01:39 -0800, Yongseok Koh wrote: > > > --------------------------------------------------------------- > > > ---- > > > --- > > > In config/arm64_armv8_linuxapp_gcc, maximum available cache line > > > size > > > (128B) in arm64 implementations is set by default for generic > > > config. > > > However, setting 64B is preferable for meson build in order to > > > support > > > majority of CPUs which don't have Implementor ID or Part Number > > > programmed > > > on chip. > > > > Adding Luca to get input from distro build perspective. > > > > If I understand it correctly, distro build will be using > > the generic config/arm/arm64_armv8_linuxapp_gcc for generic build. > > If so, We can not change cache line size for generic config > > as mentined the reason are > > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fmails.dpdk.org%2Farchives%2Fdev%2F2019-January%2F122441.html&data=02%7C01%7Cyskoh%40mellanox.com%7Cf0818214ecbf492d5c1408d6761a9136%7Ca652971c7d2e4d9ba6a4d149256f461b%7C0%7C0%7C636826253828868015&sdata=7pT%2BPTNslOpTCIqFjaZ223Hg3btpDB3dGC9xiy13wDA%3D&reserved=0 > > My understanding from your comment was distro build doesn't use meson > but make with config/defconfig_arm64-armv8a-linuxapp-gcc.
Thats for now, Going forward distro build will switch to meson. > Let's hear from Luca. > > > I think, I way forward is to add config/arm/arm64_a72_linuxapp_gcc > > for meson. This config can be used for all SoC with A72 armv8 > > implementation and may have sym link to specfific SoC to avoid > > confusion to end users. > > Is config/arm/arm64_a72_linuxapp_gcc valid? Others have Yes. For cross compiling for A72. Having not seperate IMPLEMENTOR ID is a chip design issue. I think it can work around by creating config/arm/arm64_<your_soc_name>_linuxapp_gcc and build on x86 or arm64 through meson build --cross-file config/arm/arm64_<your_soc_name>_linuxapp_gcc > arm64_[IMPLEMENTOR]_linuxapp_gcc. > a72 is got from PartNum. > > Thanks, > Yongseok > > > > Signed-off-by: Yongseok Koh <ys...@mellanox.com> > > > --- > > > > > > Discussion on the mailing list: > > > > > > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fmails.dpdk.org%2Farchives%2Fdev%2F2019-January%2F122441.html&data=02%7C01%7Cyskoh%40mellanox.com%7Cf0818214ecbf492d5c1408d6761a9136%7Ca652971c7d2e4d9ba6a4d149256f461b%7C0%7C0%7C636826253828868015&sdata=7pT%2BPTNslOpTCIqFjaZ223Hg3btpDB3dGC9xiy13wDA%3D&reserved=0 > > > > > > config/arm/meson.build | 11 +++++++---- > > > 1 file changed, 7 insertions(+), 4 deletions(-) > > > > > > diff --git a/config/arm/meson.build b/config/arm/meson.build > > > index dae55d6b26..3af256a5ec 100644 > > > --- a/config/arm/meson.build > > > +++ b/config/arm/meson.build > > > @@ -47,8 +47,7 @@ flags_common_default = [ > > > flags_generic = [ > > > ['RTE_MACHINE', '"armv8a"'], > > > ['RTE_MAX_LCORE', 256], > > > - ['RTE_USE_C11_MEM_MODEL', true], > > > - ['RTE_CACHE_LINE_SIZE', 128]] > > > + ['RTE_USE_C11_MEM_MODEL', true]] > > > flags_cavium = [ > > > ['RTE_MACHINE', '"thunderx"'], > > > ['RTE_CACHE_LINE_SIZE', 128], > > > @@ -89,15 +88,19 @@ impl_dpaa2 = ['NXP DPAA2', flags_dpaa2, > > > machine_args_generic] > > > > > > dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) > > > > > > +# In config/arm64_armv8_linuxapp_gcc, maximum available cache > > > line > > > size (128B) > > > +# in arm64 implementations is set by default for generic config. > > > However, > > > +# setting 64B is preferable for meson build in order to support > > > majority of CPUs > > > +# which don't have Implementor ID or Part Number programmed on > > > chip. > > > +dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64) > > > + > > > if cc.sizeof('void *') != 8 > > > - dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64) > > > dpdk_conf.set('RTE_ARCH_ARM', 1) > > > dpdk_conf.set('RTE_ARCH_ARMv7', 1) > > > # the minimum architecture supported, armv7-a, needs the > > > following, > > > # mk/machine/armv7a/rte.vars.mk sets it too > > > machine_args += '-mfpu=neon' > > > else > > > - dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128) > > > dpdk_conf.set('RTE_ARCH_ARM64', 1) > > > dpdk_conf.set('RTE_ARCH_64', 1) > > >
