On 1/10/19 11:55 PM, Gage Eads wrote:
This operation can be used for non-blocking algorithms, such as a
non-blocking stack or ring.

Signed-off-by: Gage Eads <gage.e...@intel.com>
---
  .../common/include/arch/x86/rte_atomic_64.h        | 22 ++++++++++++++++++++++
  1 file changed, 22 insertions(+)

diff --git a/lib/librte_eal/common/include/arch/x86/rte_atomic_64.h 
b/lib/librte_eal/common/include/arch/x86/rte_atomic_64.h
index fd2ec9c53..34c2addf8 100644
--- a/lib/librte_eal/common/include/arch/x86/rte_atomic_64.h
+++ b/lib/librte_eal/common/include/arch/x86/rte_atomic_64.h
@@ -34,6 +34,7 @@
  /*
   * Inspired from FreeBSD src/sys/amd64/include/atomic.h
   * Copyright (c) 1998 Doug Rabson
+ * Copyright (c) 2019 Intel Corporation
   * All rights reserved.
   */
@@ -208,4 +209,25 @@ static inline void rte_atomic64_clear(rte_atomic64_t *v)
  }
  #endif
+static inline int
+rte_atomic128_cmpset(volatile uint64_t *dst, uint64_t *exp, uint64_t *src)
+{
+       uint8_t res;
+
+       asm volatile (
+                     MPLOCKED
+                     "cmpxchg16b %[dst];"
+                     " sete %[res]"
+                     : [dst] "=m" (*dst),
+                       [res] "=r" (res)
+                     : "c" (src[1]),
+                       "b" (src[0]),
+                       "m" (*dst),
+                       "d" (exp[1]),
+                       "a" (exp[0])
+                     : "memory");
+
+       return res;
+}
+
  #endif /* _RTE_ATOMIC_X86_64_

Is it OK to add it to rte_atomic_64.h header which is for 64-bit integer ops?

Andrew.
H_ */

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