On Mon, 2019-01-14 at 07:47 +0000, Honnappa Nagarahalli wrote: > > On Sat, 2019-01-05 at 22:47 +0000, Honnappa Nagarahalli wrote: > > > > On Fri, 2019-01-04 at 19:59 +0000, Yongseok Koh wrote: > > > > > ----------------------------------------------------------- > > > > > ---- > > > > > ---- > > > > > --- > > > > > Hi, > > > > > > > > > > The cacheline size (RTE_CACHE_LINE_SIZE) for ARM CPUs is set > > > > > to be > > > > > 128B by default. Mellanox's BlueField is an ARM CPU having > > > > > Cortex-A72 > > > > > and its CL size is 64B. > > > Just wondering how many devices are out there with 128B cache > > > line? I > > > also have not heard about any future devices with 128B cache > > > line. If > > > the majority is 64B, why not keep 64B as the default? > > > > The problem is, In the armv8 spec the cache line size is > > IMPLEMENTATION > > DEFINED. Marvell's embedded processors has 128B CL and Server > > processors > > has 64B CL. > > > > Assuming the defconfig_arm64-armv8a-linuxapp-gcc will be used by > > distro > > folks then that configuration should support all the devices with > > armv8.1 spec. For instance, marvells new chips are armv8.2 but we > > can not > > make that as default. > What will happen in the future when we will have v9, v10 etc? I think > the distro(generic/binary portable) config should get rid of v8.
Will it be too much overhead if the image is same for v8, v9 and v10. I think, we can inline with what distro folks are doing for other packages, I think, DPDK package does not need any exception.
