In order to get more accurate the cntvct_el0 reading,
SW must invoke isb.
Fixes: ccad39ea0712 ("eal/arm: add cpu cycle operations for ARMv8")
Cc: sta...@dpdk.org
Reviewed-by: David Marchand <david.march...@redhat.com>
Reviewed-by: Jerin Jacob <jerinjac...@gmail.com>
Reviewed-by: Gavin Hu <gavin...@arm.com>
Signed-off-by: Haifeng Lin <haifeng....@huawei.com>
---
lib/librte_eal/common/include/arch/arm/rte_cycles_64.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/librte_eal/common/include/arch/arm/rte_cycles_64.h
b/lib/librte_eal/common/include/arch/arm/rte_cycles_64.h
index 68e7c7338..da557b6a1 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_cycles_64.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_cycles_64.h
@@ -62,7 +62,7 @@ rte_rdtsc(void)
static inline uint64_t
rte_rdtsc_precise(void)
{
- rte_mb();
+ asm volatile("isb" : : : "memory");
return rte_rdtsc();
}
--
2.24.1.windows.2
