On 7/16/2020 9:23 AM, Viacheslav Ovsiienko wrote: > To provide the packet send schedule on mbuf timestamp the Tx > queue must be attached to the same UAR as Clock Queue is. > UAR is special hardware related resource mapped to the host > memory and provides doorbell registers, the assigning UAR > to the queue being created is provided via DevX API only. > > Signed-off-by: Viacheslav Ovsiienko <viachesl...@mellanox.com> > Acked-by: Matan Azrad <ma...@mellanox.com>
<...> > + MLX5_ASSERT(sh->tx_uar); > + MLX5_ASSERT(sh->tx_uar->reg_addr); > + txq_ctrl->bf_reg = sh->tx_uar->reg_addr; > + txq_ctrl->uar_mmap_offset = sh->tx_uar->mmap_off; > + rte_atomic32_set(&txq_obj->refcnt, 1); This is using a function we plan to deprecate in long term, and checkpatch has a warning for it [1]. To prevent this being blocker, I will preceed with the patchset and can you please send an increamental patch to fix it, I can squash it before -rc2. Thanks, ferruh [1] Warning in drivers/net/mlx5/mlx5_txq.c: Using rte_atomicNN_xxx
