Hi Xavier, > -----Original Message----- > From: Wei Hu (Xavier) <[email protected]> > Sent: Saturday, July 18, 2020 10:18 AM > To: Honnappa Nagarahalli <[email protected]>; > [email protected] > Cc: nd <[email protected]>; Ruifeng Wang <[email protected]>; Wei Hu > (Xavier) <[email protected]> > Subject: Re: [dpdk-dev] [PATCH] lib/librte_eal: support SVE flag on ARM64 > > Hi, Honnappa Nagarahalli > > > On 2020/7/18 7:04, Honnappa Nagarahalli wrote: > > Hi, > > Thanks for the patch. Has this been tested on any platform (simulator, > emulator etc)? Do you plan to add more code using SVE? > We have tested it on FPGA board and will upstream some code using SVE > later.
For completeness, cpuflags unit test also needs an update to check for the newly added SVE flag. BTW, is there a plan to add SVE2 flag as well? Thanks. Ruifeng > > Thanks, Xavier > > Thank you, > > Honnappa > > > >> -----Original Message----- > >> From: dev <[email protected]> On Behalf Of Wei Hu (Xavier) > >> Sent: Friday, July 17, 2020 7:08 AM > >> To: [email protected] > >> Cc: [email protected] > >> Subject: [dpdk-dev] [PATCH] lib/librte_eal: support SVE flag on ARM64 > >> > >> From: Chengwen Feng <[email protected]> > >> > >> SVE is the next-generation SIMD extension of the ARMv8-A AArch64 > >> instruction set. > >> The related marco definition can be found in linux kernel: > >> arch/arm64/include/uapi/asm/hwcap.h > >> > >> This patch supports getting cpu SVE feature on ARM64 platform. > >> > >> Signed-off-by: Chengwen Feng <[email protected]> > >> Signed-off-by: Wei Hu (Xavier) <[email protected]> > >> --- > >> lib/librte_eal/arm/include/rte_cpuflags_64.h | 1 + > >> lib/librte_eal/arm/rte_cpuflags.c | 1 + > >> 2 files changed, 2 insertions(+) > >> > >> diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h > >> b/lib/librte_eal/arm/include/rte_cpuflags_64.h > >> index 95cc014..069844d 100644 > >> --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h > >> +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h > >> @@ -22,6 +22,7 @@ enum rte_cpu_flag_t { > >> RTE_CPUFLAG_SHA2, > >> RTE_CPUFLAG_CRC32, > >> RTE_CPUFLAG_ATOMICS, > >> + RTE_CPUFLAG_SVE, > >> RTE_CPUFLAG_AARCH64, > >> /* The last item */ > >> RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */ > diff > >> --git a/lib/librte_eal/arm/rte_cpuflags.c > >> b/lib/librte_eal/arm/rte_cpuflags.c > >> index caf3dc8..b1e220b 100644 > >> --- a/lib/librte_eal/arm/rte_cpuflags.c > >> +++ b/lib/librte_eal/arm/rte_cpuflags.c > >> @@ -95,6 +95,7 @@ const struct feature_entry rte_cpu_feature_table[] > = { > >> FEAT_DEF(SHA2, REG_HWCAP, 6) > >> FEAT_DEF(CRC32, REG_HWCAP, 7) > >> FEAT_DEF(ATOMICS, REG_HWCAP, 8) > >> + FEAT_DEF(SVE, REG_HWCAP, 22) > >> FEAT_DEF(AARCH64, REG_PLATFORM, 1) > >> }; > >> #endif /* RTE_ARCH */ > >> -- > >> 2.7.4 > >
