For x86 platform, the rq cqe without cache aligned, which can
improve performace for some gateway scenarios.
Fixes: 361a9ccf81d6 ("net/hinic: optimize Rx performance")
Cc: sta...@dpdk.org
Signed-off-by: Xiaoyun wang <cloud.wangxiao...@huawei.com>
---
drivers/net/hinic/hinic_pmd_rx.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/net/hinic/hinic_pmd_rx.h b/drivers/net/hinic/hinic_pmd_rx.h
index 49fa565..8a45f2d 100644
--- a/drivers/net/hinic/hinic_pmd_rx.h
+++ b/drivers/net/hinic/hinic_pmd_rx.h
@@ -35,7 +35,11 @@ struct hinic_rq_cqe {
u32 rss_hash;
u32 rsvd[4];
+#if defined(RTE_ARCH_ARM64)
} __rte_cache_aligned;
+#else
+};
+#endif
struct hinic_rq_cqe_sect {
struct hinic_sge sge;
--
1.8.3.1
