> -----Original Message----- > From: Maxime Coquelin <[email protected]> > Sent: Wednesday, October 28, 2020 5:35 PM > To: Xueming(Steven) Li <[email protected]>; Matan Azrad > <[email protected]>; Slava Ovsiienko <[email protected]> > Cc: [email protected]; Asaf Penso <[email protected]>; [email protected] > Subject: Re: [dpdk-dev] [PATCH 2/2] vdpa/mlx5: specify lag port affinity > > > > On 10/26/20 12:10 PM, Xueming Li wrote: > > If set TIS lag port affinity to auto, firmware assign port affinity on > > each creation with Round Robin. In case of 2 PFs, if create virtq, > > destroy and create again, then each virtq will get same port affinity. > > > > To resolve this fw limitation, this patch sets create TIS with > > specified affinity for each PF. > > OK, this patch describes better the issue the series is addressing. > Could you add a Fixes tag, so that it helps maintainers to backport it? > Sure, I'll come up with a new version, thanks!
> Other than that: > Reviewed-by: Maxime Coquelin <[email protected]> > > Thanks, > Maxime > > > Cc: [email protected] > > > > Signed-off-by: Xueming Li <[email protected]> > > Acked-by: Matan Azrad <[email protected]> > > --- > > drivers/vdpa/mlx5/mlx5_vdpa.c | 3 +++ > > drivers/vdpa/mlx5/mlx5_vdpa.h | 3 ++- > > drivers/vdpa/mlx5/mlx5_vdpa_virtq.c | 23 ++++++++++++++--------- > > 3 files changed, 19 insertions(+), 10 deletions(-) > >
