Hi, > -----Original Message----- > From: Bing Zhao <[email protected]> > Sent: Tuesday, November 3, 2020 7:42 AM > To: Slava Ovsiienko <[email protected]>; Matan Azrad > <[email protected]> > Cc: [email protected]; Ori Kam <[email protected]>; Raslan Darawsheh > <[email protected]>; [email protected] > Subject: [PATCH] net/mlx5: fix the eCPRI common header endianness > > The input header of a RTE flow item is with network byte order. In > the host with little endian, the bit field order are the same as the > byte order. > When checking the an eCPRI message type, the wrong field will be > selected. Right now, since the whole u32 is being checked and for > all types, the following implementation is unique. There is no > functional risk but it is still an error to fix. > > Fixes: daa38a8924a0 ("net/mlx5: add flow translation of eCPRI header") > > Cc: [email protected] > > Signed-off-by: Bing Zhao <[email protected]> > Acked-by: Viacheslav Ovsiienko <[email protected]> > --- > drivers/net/mlx5/mlx5_flow_dv.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > Patch applied to next-net-mlx,
Kindest regards, Raslan Darawsheh
