The patch includes OS abstracted changes required to support new
hardware and the new feature supported by it. It also adds new bit
ops to RTE library.
Signed-off-by: Rasesh Mody <rm...@marvell.com>
Signed-off-by: Igor Russkikh <irussk...@marvell.com>
---
drivers/net/qede/base/bcm_osal.c | 2 +-
drivers/net/qede/base/bcm_osal.h | 39 ++++++++++++++++++---
lib/librte_eal/include/rte_bitops.h | 54 ++++++++++++++++++++++++++++-
3 files changed, 88 insertions(+), 7 deletions(-)
diff --git a/drivers/net/qede/base/bcm_osal.c b/drivers/net/qede/base/bcm_osal.c
index 2c59397e0..23a84795f 100644
--- a/drivers/net/qede/base/bcm_osal.c
+++ b/drivers/net/qede/base/bcm_osal.c
@@ -121,7 +121,7 @@ void qede_vf_fill_driver_data(struct ecore_hwfn *hwfn,
struct ecore_vf_acquire_sw_info *vf_sw_info)
{
vf_sw_info->os_type = VFPF_ACQUIRE_OS_LINUX_USERSPACE;
- vf_sw_info->override_fw_version = 1;
+ /* TODO - fill driver version */
}
void *osal_dma_alloc_coherent(struct ecore_dev *p_dev,
diff --git a/drivers/net/qede/base/bcm_osal.h b/drivers/net/qede/base/bcm_osal.h
index c5b539928..38b7fff67 100644
--- a/drivers/net/qede/base/bcm_osal.h
+++ b/drivers/net/qede/base/bcm_osal.h
@@ -47,9 +47,10 @@ void qed_link_update(struct ecore_hwfn *hwfn);
#endif
#endif
-#define OSAL_WARN(arg1, arg2, arg3, ...) (0)
-
-#define UNUSED(x) (void)(x)
+#define UNUSED1(a) (void)(a)
+#define UNUSED2(a, b) ((void)(a), UNUSED1(b))
+#define UNUSED3(a, b, c) ((void)(a), UNUSED2(b, c))
+#define UNUSED4(a, b, c, d) ((void)(a), UNUSED3(b, c, d))
/* Memory Types */
typedef uint8_t u8;
@@ -167,9 +168,8 @@ typedef pthread_mutex_t osal_mutex_t;
#define OSAL_SPIN_UNLOCK(lock) rte_spinlock_unlock(lock)
#define OSAL_SPIN_LOCK_IRQSAVE(lock, flags) \
do { \
- UNUSED(lock); \
flags = 0; \
- UNUSED(flags); \
+ UNUSED2(lock, flags); \
} while (0)
#define OSAL_SPIN_UNLOCK_IRQSAVE(lock, flags) nothing
#define OSAL_SPIN_LOCK_ALLOC(hwfn, lock) nothing
@@ -326,6 +326,18 @@ typedef struct osal_list_t {
#define OSAL_GET_BIT(bit, bitmap) \
rte_bit_relaxed_get32(bit, bitmap)
+#define OSAL_TEST_BIT(bit, bitmap) \
+ OSAL_GET_BIT(bit, bitmap)
+
+#define OSAL_TEST_AND_CLEAR_BIT(bit, bitmap) \
+ rte_bit_relaxed_test_and_clear32(bit, bitmap)
+
+#define OSAL_TEST_AND_FLIP_BIT(bit, bitmap) \
+ rte_bit_relaxed_test_and_flip32(bit, bitmap)
+
+#define OSAL_NON_ATOMIC_SET_BIT(bit, bitmap) \
+ rte_bit_relaxed_set32(bit, bitmap)
+
u32 qede_find_first_bit(unsigned long *, u32);
#define OSAL_FIND_FIRST_BIT(bitmap, length) \
qede_find_first_bit(bitmap, length)
@@ -342,7 +354,10 @@ u32 qede_find_first_zero_bit(u32 *bitmap, u32 length);
#define OSAL_BITMAP_WEIGHT(bitmap, count) 0
#define OSAL_LINK_UPDATE(hwfn) qed_link_update(hwfn)
+#define OSAL_BW_UPDATE(hwfn, ptt) nothing
#define OSAL_TRANSCEIVER_UPDATE(hwfn) nothing
+#define OSAL_TRANSCEIVER_TX_FAULT(hwfn) nothing
+#define OSAL_TRANSCEIVER_RX_LOS(hwfn) nothing
#define OSAL_DCBX_AEN(hwfn, mib_type) nothing
/* SR-IOV channel */
@@ -366,6 +381,8 @@ void osal_vf_flr_update(struct ecore_hwfn *p_hwfn);
#define OSAL_IOV_VF_MSG_TYPE(hwfn, vfid, vf_msg_type) nothing
#define OSAL_IOV_PF_RESP_TYPE(hwfn, vfid, pf_resp_type) nothing
#define OSAL_IOV_VF_VPORT_STOP(hwfn, vf) nothing
+#define OSAL_IOV_DB_REC_HANDLER(hwfn) nothing
+#define OSAL_IOV_BULLETIN_UPDATE(hwfn) nothing
u32 qede_unzip_data(struct ecore_hwfn *p_hwfn, u32 input_len,
u8 *input_buf, u32 max_size, u8 *unzip_buf);
@@ -412,16 +429,20 @@ u32 qede_osal_log2(u32);
#define OFFSETOF(str, field) __builtin_offsetof(str, field)
#define OSAL_ASSERT(is_assert) assert(is_assert)
+#define OSAL_WARN(condition, format, ...) (0)
#define OSAL_BEFORE_PF_START(file, engine) nothing
#define OSAL_AFTER_PF_STOP(file, engine) nothing
+#define OSAL_GCD(a, b) (1)
/* Endian macros */
#define OSAL_CPU_TO_BE32(val) rte_cpu_to_be_32(val)
+#define OSAL_CPU_TO_BE16(val) rte_cpu_to_be_16(val)
#define OSAL_BE32_TO_CPU(val) rte_be_to_cpu_32(val)
#define OSAL_CPU_TO_LE32(val) rte_cpu_to_le_32(val)
#define OSAL_CPU_TO_LE16(val) rte_cpu_to_le_16(val)
#define OSAL_LE32_TO_CPU(val) rte_le_to_cpu_32(val)
#define OSAL_LE16_TO_CPU(val) rte_le_to_cpu_16(val)
+#define OSAL_BE16_TO_CPU(val) rte_be_to_cpu_16(val)
#define OSAL_CPU_TO_BE64(val) rte_cpu_to_be_64(val)
#define OSAL_ARRAY_SIZE(arr) RTE_DIM(arr)
@@ -432,6 +453,7 @@ u32 qede_osal_log2(u32);
#define OSAL_STRLEN(string) strlen(string)
#define OSAL_STRCPY(dst, string) strcpy(dst, string)
#define OSAL_STRNCPY(dst, string, len) strncpy(dst, string, len)
+#define OSAL_STRLCPY(dst, string, len) strlcpy(dst, string, len)
#define OSAL_STRCMP(str1, str2) strcmp(str1, str2)
#define OSAL_STRTOUL(str, base, res) 0
@@ -463,6 +485,7 @@ u32 qede_crc32(u32 crc, u8 *ptr, u32 length);
#define OSAL_MFW_FILL_TLV_DATA(type, buf, data) (0)
#define OSAL_HW_INFO_CHANGE(p_hwfn, change) nothing
#define OSAL_MFW_CMD_PREEMPT(p_hwfn) nothing
+#define OSAL_NUM_FUNCS_IS_SET(p_hwfn) nothing
#define OSAL_PF_VALIDATE_MODIFY_TUNN_CONFIG(p_hwfn, mask, b_update, tunn) 0
#define OSAL_DIV_S64(a, b) ((a) / (b))
@@ -478,4 +501,10 @@ enum dbg_status qed_dbg_alloc_user_data(struct
ecore_hwfn *p_hwfn,
qed_dbg_alloc_user_data(p_hwfn, user_data_ptr)
#define OSAL_DB_REC_OCCURRED(p_hwfn) nothing
+typedef int osal_va_list;
+#define OSAL_VA_START(A, B) UNUSED2(A, B)
+#define OSAL_VA_END(A) UNUSED1(A)
+#define OSAL_VSNPRINTF(A, ...) 0
+#define OSAL_INT_DBG_STORE(P_DEV, ...) nothing
+
#endif /* __BCM_OSAL_H */
diff --git a/lib/librte_eal/include/rte_bitops.h
b/lib/librte_eal/include/rte_bitops.h
index 141e8ea73..9a39dd13c 100644
--- a/lib/librte_eal/include/rte_bitops.h
+++ b/lib/librte_eal/include/rte_bitops.h
@@ -54,7 +54,7 @@ rte_bit_relaxed_get32(unsigned int nr, volatile uint32_t
*addr)
{
RTE_ASSERT(nr < 32);
- uint32_t mask = UINT32_C(1) << nr;
+ uint32_t mask = RTE_BIT32(nr);
return (*addr) & mask;
}
@@ -152,6 +152,32 @@ rte_bit_relaxed_test_and_clear32(unsigned int nr, volatile
uint32_t *addr)
return val & mask;
}
+/**
+ * @warning
+ * @b EXPERIMENTAL: this API may change, or be removed, without prior notice
+ *
+ * Return the original bit from a 32-bit value, then flip it to 0 without
+ * memory ordering.
+ *
+ * @param nr
+ * The target bit to get and flip.
+ * @param addr
+ * The address holding the bit.
+ * @return
+ * The original bit.
+ */
+__rte_experimental
+static inline uint32_t
+rte_bit_relaxed_test_and_flip32(unsigned int nr, volatile uint32_t *addr)
+{
+ RTE_ASSERT(nr < 32);
+
+ uint32_t mask = RTE_BIT32(nr);
+ uint32_t val = *addr;
+ *addr = val ^ mask;
+ return val & mask;
+}
+
/*------------------------ 64-bit relaxed operations ------------------------*/
/**
@@ -271,4 +297,30 @@ rte_bit_relaxed_test_and_clear64(unsigned int nr, volatile
uint64_t *addr)
return val & mask;
}
+/**
+ * @warning
+ * @b EXPERIMENTAL: this API may change, or be removed, without prior notice
+ *
+ * Return the original bit from a 64-bit value, then flip it to 0 without
+ * memory ordering.
+ *
+ * @param nr
+ * The target bit to get and flip.
+ * @param addr
+ * The address holding the bit.
+ * @return
+ * The original bit.
+ */
+__rte_experimental
+static inline uint64_t
+rte_bit_relaxed_test_and_flip64(unsigned int nr, volatile uint64_t *addr)
+{
+ RTE_ASSERT(nr < 64);
+
+ uint64_t mask = RTE_BIT64(nr);
+ uint64_t val = *addr;
+ *addr = val ^ mask;
+ return val & mask;
+}
+
#endif /* _RTE_BITOPS_H_ */
--
2.18.0
