Hi David and ferru: Any other issue integrating this patch?
On 2021/3/2 0:01, 谢华伟(此时此刻） wrote:
From: "huawei.xhw"<huawei....@alibaba-inc.com> virtio PMD assumes legacy device only supports PIO BAR resource. This is wrong. As we need to create lots of devices, as PIO resource on x86 is very limited, we expose MMIO(memory IO) BAR. Kernel supports both PIO and MMIO BAR for legacy virtio-pci device, and for all other pci devices. This patchset handles different type of BAR in the similar way. In previous implementation, under igb_uio driver we get PIO address from igb_uio sysfs entry; with uio_pci_generic, we get PIO address from /proc/ioports for x86, and for other ARCHs, we get PIO address from standard PCI sysfs entry. For PIO/MMIO RW, there is different path for different drivers and arch.
