Hello Stephen, Wednesday, June 3, 2015, 8:40:14 PM, you wrote:
> On Tue, 2 Jun 2015 15:11:30 +0200 > Roman Dementiev <roman.dementiev at intel.com> wrote: >> >> This series of patches adds methods that use hardware memory transactions >> (HTM) >> on fast-path for DPDK locks (a.k.a. lock elision). Here the methods are >> implemented >> for x86 using Restricted Transactional Memory instructions (Intel(r) >> Transactional >> Synchronization Extensions). The implementation fall-backs to the normal >> DPDK lock >> if HTM is not available or memory transactions fail. >> This is not a replacement for all lock usages since not all critical >> sections protected >> by locks are friendly to HTM. >> > You probably want to put a caveat around this, it won't work for people > that expect to use spinlocks to protect I/O operations on hardware. > Since I/O operations aren't like memory. yes, I/O can not be rolled back by the CPU if the transaction should fail. Thus the HTM transaction protecting I/O operations are always aborted by CPU. In Intel TSX the I/O operations (MMIO, outp, etc) are TSX-unfriendly causing immediate abort. -- Best regards, Roman mailto:roman.dementiev at intel.com Intel GmbH Dornacher Strasse 1 85622 Feldkirchen/Muenchen, Deutschland Sitz der Gesellschaft: Feldkirchen bei Muenchen Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk Registergericht: Muenchen HRB 47456 Ust.-IdNr./VAT Registration No.: DE129385895 Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052
