> -----Original Message-----
> From: dev <dev-boun...@dpdk.org> On Behalf Of Xueming Li
> Sent: Monday, May 10, 2021 16:14
> Cc: dev@dpdk.org; Xueming(Steven) Li <xuemi...@nvidia.com>;
> sta...@dpdk.org
> Subject: [dpdk-dev] [PATCH v2] net/mlx5: fix LAG representor probe on PF1
> PCI
>
> In case of bonding, orchestrator wants to use same devargs for LAG and non-
> LAG scenario to probe representor on PF1 using PF1 PCI address like
> "<DBDF_PF1>,representor=pf1vf[0-3]".
>
> This patch changes PCI address check policy to allow PF1 PCI address for
> representors on PF1.
>
> Note: detaching PF0 device can't remove representors on PF1. It's
> recommended to use primary(PF0) PCI address to probe representors on
> both PFs.
>
> Fixes: f926cce3fa94 ("net/mlx5: refactor bonding representor probing")
>
> Cc: sta...@dpdk.org
> Signed-off-by: Xueming Li <xuemi...@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viachesl...@nvidia.com>
