> -----Original Message-----
> From: dev <dev-boun...@dpdk.org> On Behalf Of Chengwen Feng
> Sent: Monday, May 10, 2021 15:06
> To: NBU-Contact-Thomas Monjalon <tho...@monjalon.net>;
> ferruh.yi...@intel.com
> Cc: dev@dpdk.org
> Subject: [dpdk-dev] [PATCH 2/2] net/mlx5: fix memory barrier incorrectly
> placed
>
> The memory barrier is used to ensure that the response is returned only
> after the Tx/Rx function is set, it should place after the Rx/Tx function is
> set.
>
> Fixes: 2aac5b5d119f ("net/mlx5: sync stop/start with secondary process")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Chengwen Feng <fengcheng...@huawei.com>
Acked-by: Viacheslav Ovsiienko <viachesl...@nvidia.com>
