Hi, Beilei Thanks for your comments, please see below.
> -----邮件原件----- > 发件人: Xing, Beilei <beilei.x...@intel.com> > 发送时间: 2021年6月22日 14:08 > 收件人: Feifei Wang <feifei.wa...@arm.com> > 抄送: dev@dpdk.org; nd <n...@arm.com>; Ruifeng Wang > <ruifeng.w...@arm.com> > 主题: RE: [PATCH v1 1/2] net/i40e: improve performance for scalar Tx > > > > > -----Original Message----- > > From: Feifei Wang <feifei.wa...@arm.com> > > Sent: Thursday, May 27, 2021 4:17 PM > > To: Xing, Beilei <beilei.x...@intel.com> > > Cc: dev@dpdk.org; n...@arm.com; Feifei Wang <feifei.wa...@arm.com>; > > Ruifeng Wang <ruifeng.w...@arm.com> > > Subject: [PATCH v1 1/2] net/i40e: improve performance for scalar Tx > > > > For i40e scalar Tx path, if implement FAST_FREE_MBUF mode, it means > > per- queue all mbufs come from the same mempool and have refcnt = 1. > > > > Thus we can use bulk free of the buffers when mbuf fast free mode is > > enabled. > > > > For scalar path in arm platform: > > In n1sdp, performance is improved by 7.8%; In thunderx2, performance > > is improved by 6.7%. > > > > For scalar path in x86 platform, > > performance is improved by 6%. > > > > Suggested-by: Ruifeng Wang <ruifeng.w...@arm.com> > > Signed-off-by: Feifei Wang <feifei.wa...@arm.com> > > --- > > drivers/net/i40e/i40e_rxtx.c | 5 ++++- > > 1 file changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/net/i40e/i40e_rxtx.c > > b/drivers/net/i40e/i40e_rxtx.c index > > 6c58decece..fe7b20f750 100644 > > --- a/drivers/net/i40e/i40e_rxtx.c > > +++ b/drivers/net/i40e/i40e_rxtx.c > > @@ -1295,6 +1295,7 @@ i40e_tx_free_bufs(struct i40e_tx_queue *txq) { > > struct i40e_tx_entry *txep; > > uint16_t i; > > + struct rte_mbuf *free[RTE_I40E_TX_MAX_FREE_BUF_SZ]; > > > > if ((txq->tx_ring[txq->tx_next_dd].cmd_type_offset_bsz & > > > rte_cpu_to_le_64(I40E_TXD_QW1_DTYPE_MASK)) != @@ -1308,9 > +1309,11 > > @@ i40e_tx_free_bufs(struct i40e_tx_queue *txq) > > > > if (txq->offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE) { > > for (i = 0; i < txq->tx_rs_thresh; ++i, ++txep) { > > - rte_mempool_put(txep->mbuf->pool, txep->mbuf); > > + free[i] = txep->mbuf; > > The tx_rs_thresh can be 'nb_desc - 3', so if tx_rs_thres > > RTE_I40E_TX_MAX_FREE_BUF_SZ, there'll be out of bounds, right? Actually tx_rs_thresh <= tx__free_thresh < nb_desc - 3 (i40e_dev_tx_queue_setup). However, I don't know how it affects the relationship between tx_rs_thresh and RTE_I40E_TX_MAX_FREE_BUF_SZ. Furthermore, I think you are right that tx_rs_thres can be greater than RTE_I40E_TX_MAX_FREE_BUF_SZ in tx_simple_mode (i40e_set_tx_function_flag). Thus, in scalar path, we can change like: --------------------------------------------------------------------------------------------------------------- int n = txq->tx_rs_thresh; int32_t i = 0, j = 0; const int32_t k = RTE_ALIGN_FLOOR(n, RTE_I40E_TX_MAX_FREE_BUF_SZ); const int32_t m = n % RTE_I40E_TX_MAX_FREE_BUF_SZ; struct rte_mbuf *free[RTE_I40E_TX_MAX_FREE_BUF_SZ]; For FAST_FREE_MODE: if (k) { for (j = 0; j != k - RTE_I40E_TX_MAX_FREE_BUF_SZ; j += RTE_I40E_TX_MAX_FREE_BUF_SZ) { for (i = 0; i <RTE_I40E_TX_MAX_FREE_BUF_SZ; ++i, ++txep) { free[i] = txep->mbuf; txep->mbuf = NULL; } rte_mempool_put_bulk(free[0]->pool, (void **)free, RTE_I40E_TX_MAX_FREE_BUF_SZ); } } else { for (i = 0; i < m; ++i, ++txep) { free[i] = txep->mbuf; txep->mbuf = NULL; } rte_mempool_put_bulk(free[0]->pool, (void **)free, m); } --------------------------------------------------------------------------------------------------------------- Best Regards Feifei