On Fri, Sep 17, 2021 at 4:55 PM Ashwin Sekhar T K <[email protected]> wrote:
>
> Network Pool accelerator (NPA) is part of ROC (Rest Of Chip). So
> NPA structures should be aligned to ROC Cache line size and not
> CPU cache line size.
>
> Non alignment of NPA stack to ROC cache line will result in
> undefined runtime NPA behaviour.
>
> Fixes: f765f5611240 ("common/cnxk: add NPA pool HW operations")
>
> Signed-off-by: Ashwin Sekhar T K <[email protected]>
> Acked-by: Jerin Jacob <[email protected]>
Applied to dpdk-next-net-mrvl/for-next-net. Thanks
> ---
> drivers/common/cnxk/roc_npa.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/common/cnxk/roc_npa.c b/drivers/common/cnxk/roc_npa.c
> index d064d125c1..a0d2cc8f19 100644
> --- a/drivers/common/cnxk/roc_npa.c
> +++ b/drivers/common/cnxk/roc_npa.c
> @@ -194,7 +194,7 @@ npa_stack_dma_alloc(struct npa_lf *lf, char *name, int
> pool_id, size_t size)
> {
> const char *mz_name = npa_stack_memzone_name(lf, pool_id, name);
>
> - return plt_memzone_reserve_cache_align(mz_name, size);
> + return plt_memzone_reserve_aligned(mz_name, size, 0, ROC_ALIGN);
> }
>
> static inline int
> --
> 2.32.0
>
