Add support in existing bbdev PMDs for the explicit number of queue
and priority for each operation type configured on the device.

Signed-off-by: Nicolas Chautru <nicolas.chau...@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c           | 29 +++++++++++++---------
 drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c |  8 ++++++
 drivers/baseband/fpga_lte_fec/fpga_lte_fec.c       |  8 ++++++
 drivers/baseband/la12xx/bbdev_la12xx.c             |  8 +++++-
 4 files changed, 40 insertions(+), 13 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c 
b/drivers/baseband/acc100/rte_acc100_pmd.c
index de7e4bc..49cc9d2 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -966,6 +966,7 @@
                struct rte_bbdev_driver_info *dev_info)
 {
        struct acc100_device *d = dev->data->dev_private;
+       int i;
 
        static const struct rte_bbdev_op_cap bbdev_capabilities[] = {
                {
@@ -1061,19 +1062,23 @@
        /* Read and save the populated config from ACC100 registers */
        fetch_acc100_config(dev);
 
-       /* This isn't ideal because it reports the maximum number of queues but
-        * does not provide info on how many can be uplink/downlink or different
-        * priorities
-        */
-       dev_info->max_num_queues =
-                       d->acc100_conf.q_dl_5g.num_aqs_per_groups *
-                       d->acc100_conf.q_dl_5g.num_qgroups +
-                       d->acc100_conf.q_ul_5g.num_aqs_per_groups *
-                       d->acc100_conf.q_ul_5g.num_qgroups +
-                       d->acc100_conf.q_dl_4g.num_aqs_per_groups *
-                       d->acc100_conf.q_dl_4g.num_qgroups +
-                       d->acc100_conf.q_ul_4g.num_aqs_per_groups *
+       /* Expose number of queues */
+       dev_info->num_queues[RTE_BBDEV_OP_NONE] = 0;
+       dev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] = 
d->acc100_conf.q_ul_4g.num_aqs_per_groups *
                        d->acc100_conf.q_ul_4g.num_qgroups;
+       dev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] = 
d->acc100_conf.q_dl_4g.num_aqs_per_groups *
+                       d->acc100_conf.q_dl_4g.num_qgroups;
+       dev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] = 
d->acc100_conf.q_ul_5g.num_aqs_per_groups *
+                       d->acc100_conf.q_ul_5g.num_qgroups;
+       dev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = 
d->acc100_conf.q_dl_5g.num_aqs_per_groups *
+                       d->acc100_conf.q_dl_5g.num_qgroups;
+       dev_info->queue_priority[RTE_BBDEV_OP_TURBO_DEC] = 
d->acc100_conf.q_ul_4g.num_qgroups;
+       dev_info->queue_priority[RTE_BBDEV_OP_TURBO_ENC] = 
d->acc100_conf.q_dl_4g.num_qgroups;
+       dev_info->queue_priority[RTE_BBDEV_OP_LDPC_DEC] = 
d->acc100_conf.q_ul_5g.num_qgroups;
+       dev_info->queue_priority[RTE_BBDEV_OP_LDPC_ENC] = 
d->acc100_conf.q_dl_5g.num_qgroups;
+       dev_info->max_num_queues = 0;
+       for (i = RTE_BBDEV_OP_NONE; i < RTE_BBDEV_OP_TYPE_COUNT; i++)
+               dev_info->max_num_queues += dev_info->num_queues[i];
        dev_info->queue_size_lim = ACC100_MAX_QUEUE_DEPTH;
        dev_info->hardware_accelerated = true;
        dev_info->max_dl_queue_priority =
diff --git a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c 
b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c
index 15d23d6..f92b59a 100644
--- a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c
+++ b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c
@@ -382,6 +382,14 @@
                if (hw_q_id != FPGA_INVALID_HW_QUEUE_ID)
                        dev_info->max_num_queues++;
        }
+       /* Expose number of queue per operation type */
+       dev_info->num_queues[RTE_BBDEV_OP_NONE] = 0;
+       dev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] = 0;
+       dev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] = 0;
+       dev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] = dev_info->max_num_queues 
/ 2;
+       dev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = dev_info->max_num_queues 
/ 2;
+       dev_info->queue_priority[RTE_BBDEV_OP_LDPC_DEC] = 1;
+       dev_info->queue_priority[RTE_BBDEV_OP_LDPC_ENC] = 1;
 }
 
 /**
diff --git a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c 
b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c
index 21d3529..56d1baf 100644
--- a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c
+++ b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c
@@ -654,6 +654,14 @@ struct __rte_cache_aligned fpga_queue {
                if (hw_q_id != FPGA_INVALID_HW_QUEUE_ID)
                        dev_info->max_num_queues++;
        }
+       /* Expose number of queue per operation type */
+       dev_info->num_queues[RTE_BBDEV_OP_NONE] = 0;
+       dev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] = dev_info->max_num_queues 
/ 2;
+       dev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] = dev_info->max_num_queues 
/ 2;
+       dev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] = 0;
+       dev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = 0;
+       dev_info->queue_priority[RTE_BBDEV_OP_TURBO_DEC] = 1;
+       dev_info->queue_priority[RTE_BBDEV_OP_TURBO_ENC] = 1;
 }
 
 /**
diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c 
b/drivers/baseband/la12xx/bbdev_la12xx.c
index 4d1bd16..69f32ee 100644
--- a/drivers/baseband/la12xx/bbdev_la12xx.c
+++ b/drivers/baseband/la12xx/bbdev_la12xx.c
@@ -100,7 +100,13 @@ struct bbdev_la12xx_params {
        dev_info->capabilities = bbdev_capabilities;
        dev_info->cpu_flag_reqs = NULL;
        dev_info->min_alignment = 64;
-
+       dev_info->num_queues[RTE_BBDEV_OP_NONE] = 0;
+       dev_info->num_queues[RTE_BBDEV_OP_TURBO_DEC] = 0;
+       dev_info->num_queues[RTE_BBDEV_OP_TURBO_ENC] = 0;
+       dev_info->num_queues[RTE_BBDEV_OP_LDPC_DEC] = LA12XX_MAX_QUEUES / 2;
+       dev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = LA12XX_MAX_QUEUES / 2;
+       dev_info->queue_priority[RTE_BBDEV_OP_LDPC_DEC] = 1;
+       dev_info->queue_priority[RTE_BBDEV_OP_LDPC_ENC] = 1;
        rte_bbdev_log_debug("got device info from %u", dev->data->dev_id);
 }
 
-- 
1.8.3.1

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