On Fri, Jun 03, 2022 at 09:19:35AM +0200, David Marchand wrote:
> Hello Bruce,
> 
> On Thu, Jun 2, 2022 at 6:14 PM Bruce Richardson
> <bruce.richard...@intel.com> wrote:
> > diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
> > index bc3e70a1d1..ed0781a560 100644
> > --- a/drivers/common/mlx5/mlx5_prm.h
> > +++ b/drivers/common/mlx5/mlx5_prm.h
> > @@ -560,7 +560,7 @@ struct mlx5_umr_wqe {
> >  struct mlx5_rdma_write_wqe {
> >         struct mlx5_wqe_cseg ctr;
> >         struct mlx5_wqe_rseg rseg;
> > -       struct mlx5_wqe_dseg dseg[0];
> > +       struct mlx5_wqe_dseg dseg[];
> >  } __rte_packed;
> >
> >  #ifdef PEDANTIC
> > @@ -3479,7 +3479,7 @@ struct mlx5_ifc_qpc_pas_list_bits {
> >  #endif
> >  struct mlx5_ifc_qpc_extension_and_pas_list_bits {
> >         struct mlx5_ifc_qpc_extension_bits qpc_data_extension;
> > -       u8 pas[0][0x40];
> > +       u8[0x40] pas[];
> 
> Gcc and clang seem to agree they disagree with coccinelle.
> clang suggests using u8 pas[][0x40].
> 

Will fix in v3.

> 
> -- 
> David Marchand
> 

Reply via email to