This patch extends hairpin-mode command line option of test-pmd application with an ability to configure whether Rx/Tx hairpin queue should use locked device memory or RTE memory.
For purposes of this configurations the following bits of 32 bit hairpin-mode are reserved: - Bit 8 - If set, then force_memory flag will be set for hairpin RX queue. - Bit 9 - If set, then force_memory flag will be set for hairpin TX queue. - Bits 12-15 - Memory options for hairpin Rx queue: - Bit 12 - If set, then use_locked_device_memory will be set. - Bit 13 - If set, then use_rte_memory will be set. - Bit 14 - Reserved for future use. - Bit 15 - Reserved for future use. - Bits 16-19 - Memory options for hairpin Tx queue: - Bit 16 - If set, then use_locked_device_memory will be set. - Bit 17 - If set, then use_rte_memory will be set. - Bit 18 - Reserved for future use. - Bit 19 - Reserved for future use. Signed-off-by: Dariusz Sosnowski <dsosnow...@nvidia.com> --- app/test-pmd/parameters.c | 2 +- app/test-pmd/testpmd.c | 24 +++++++++++++++++++++++- app/test-pmd/testpmd.h | 2 +- doc/guides/testpmd_app_ug/run_app.rst | 10 ++++++++-- 4 files changed, 33 insertions(+), 5 deletions(-) diff --git a/app/test-pmd/parameters.c b/app/test-pmd/parameters.c index e3c9757f3f..662e6e4a36 100644 --- a/app/test-pmd/parameters.c +++ b/app/test-pmd/parameters.c @@ -1162,7 +1162,7 @@ launch_args_parse(int argc, char** argv) if (errno != 0 || end == optarg) rte_exit(EXIT_FAILURE, "hairpin mode invalid\n"); else - hairpin_mode = (uint16_t)n; + hairpin_mode = (uint32_t)n; } if (!strcmp(lgopts[opt_idx].name, "burst")) { n = atoi(optarg); diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c index addcbcac85..2fbd546073 100644 --- a/app/test-pmd/testpmd.c +++ b/app/test-pmd/testpmd.c @@ -409,7 +409,7 @@ bool setup_on_probe_event = true; uint8_t clear_ptypes = true; /* Hairpin ports configuration mode. */ -uint16_t hairpin_mode; +uint32_t hairpin_mode; /* Pretty printing of ethdev events */ static const char * const eth_event_desc[] = { @@ -2552,6 +2552,16 @@ port_is_started(portid_t port_id) return 1; } +#define HAIRPIN_MODE_RX_FORCE_MEMORY RTE_BIT32(8) +#define HAIRPIN_MODE_TX_FORCE_MEMORY RTE_BIT32(9) + +#define HAIRPIN_MODE_RX_LOCKED_MEMORY RTE_BIT32(12) +#define HAIRPIN_MODE_RX_RTE_MEMORY RTE_BIT32(13) + +#define HAIRPIN_MODE_TX_LOCKED_MEMORY RTE_BIT32(16) +#define HAIRPIN_MODE_TX_RTE_MEMORY RTE_BIT32(17) + + /* Configure the Rx and Tx hairpin queues for the selected port. */ static int setup_hairpin_queues(portid_t pi, portid_t p_pi, uint16_t cnt_pi) @@ -2567,6 +2577,12 @@ setup_hairpin_queues(portid_t pi, portid_t p_pi, uint16_t cnt_pi) uint16_t peer_tx_port = pi; uint32_t manual = 1; uint32_t tx_exp = hairpin_mode & 0x10; + uint32_t rx_force_memory = hairpin_mode & HAIRPIN_MODE_RX_FORCE_MEMORY; + uint32_t rx_locked_memory = hairpin_mode & HAIRPIN_MODE_RX_LOCKED_MEMORY; + uint32_t rx_rte_memory = hairpin_mode & HAIRPIN_MODE_RX_RTE_MEMORY; + uint32_t tx_force_memory = hairpin_mode & HAIRPIN_MODE_TX_FORCE_MEMORY; + uint32_t tx_locked_memory = hairpin_mode & HAIRPIN_MODE_TX_LOCKED_MEMORY; + uint32_t tx_rte_memory = hairpin_mode & HAIRPIN_MODE_TX_RTE_MEMORY; if (!(hairpin_mode & 0xf)) { peer_rx_port = pi; @@ -2606,6 +2622,9 @@ setup_hairpin_queues(portid_t pi, portid_t p_pi, uint16_t cnt_pi) hairpin_conf.peers[0].queue = i + nb_rxq; hairpin_conf.manual_bind = !!manual; hairpin_conf.tx_explicit = !!tx_exp; + hairpin_conf.force_memory = !!tx_force_memory; + hairpin_conf.use_locked_device_memory = !!tx_locked_memory; + hairpin_conf.use_rte_memory = !!tx_rte_memory; diag = rte_eth_tx_hairpin_queue_setup (pi, qi, nb_txd, &hairpin_conf); i++; @@ -2629,6 +2648,9 @@ setup_hairpin_queues(portid_t pi, portid_t p_pi, uint16_t cnt_pi) hairpin_conf.peers[0].queue = i + nb_txq; hairpin_conf.manual_bind = !!manual; hairpin_conf.tx_explicit = !!tx_exp; + hairpin_conf.force_memory = !!rx_force_memory; + hairpin_conf.use_locked_device_memory = !!rx_locked_memory; + hairpin_conf.use_rte_memory = !!rx_rte_memory; diag = rte_eth_rx_hairpin_queue_setup (pi, qi, nb_rxd, &hairpin_conf); i++; diff --git a/app/test-pmd/testpmd.h b/app/test-pmd/testpmd.h index fb2f5195d3..bc4d9788fa 100644 --- a/app/test-pmd/testpmd.h +++ b/app/test-pmd/testpmd.h @@ -542,7 +542,7 @@ extern uint16_t stats_period; extern struct rte_eth_xstat_name *xstats_display; extern unsigned int xstats_display_num; -extern uint16_t hairpin_mode; +extern uint32_t hairpin_mode; #ifdef RTE_LIB_LATENCYSTATS extern uint8_t latencystats_enabled; diff --git a/doc/guides/testpmd_app_ug/run_app.rst b/doc/guides/testpmd_app_ug/run_app.rst index 30edef07ea..c91c231094 100644 --- a/doc/guides/testpmd_app_ug/run_app.rst +++ b/doc/guides/testpmd_app_ug/run_app.rst @@ -556,10 +556,16 @@ The command line options are: Enable display of RX and TX burst stats. -* ``--hairpin-mode=0xXX`` +* ``--hairpin-mode=0xXXXX`` - Set the hairpin port mode with bitmask, only valid when hairpin queues number is set:: + Set the hairpin port configuration with bitmask, only valid when hairpin queues number is set:: + bit 18 - hairpin TX queues will use RTE memory + bit 16 - hairpin TX queues will use locked device memory + bit 13 - hairpin RX queues will use RTE memory + bit 12 - hairpin RX queues will use locked device memory + bit 9 - force memory settings of hairpin TX queue + bit 8 - force memory settings of hairpin RX queue bit 4 - explicit Tx flow rule bit 1 - two hairpin ports paired bit 0 - two hairpin ports loop -- 2.25.1