From: Satha Rao <skotesh...@marvell.com>
Sync nix_hw_info structure with kernel.
Maintain default RR_QUANTUM for VF TL2 same as kernel to make
equal distribution among all VFs.
Signed-off-by: Satha Rao <skotesh...@marvell.com>
---
drivers/common/cnxk/roc_mbox.h | 8 +++++-
drivers/common/cnxk/roc_nix.c | 9 ++++++-
drivers/common/cnxk/roc_nix.h | 1 +
drivers/common/cnxk/roc_nix_tm.c | 10 ++++----
drivers/common/cnxk/roc_nix_tm_utils.c | 34 +++++++++++++++++++++-----
5 files changed, 49 insertions(+), 13 deletions(-)
diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h
index a47e6a8f3b..e8d4ae283d 100644
--- a/drivers/common/cnxk/roc_mbox.h
+++ b/drivers/common/cnxk/roc_mbox.h
@@ -1215,7 +1215,13 @@ struct nix_inline_ipsec_lf_cfg {
struct nix_hw_info {
struct mbox_msghdr hdr;
uint16_t __io vwqe_delay;
- uint16_t __io rsvd[15];
+ uint16_t __io max_mtu;
+ uint16_t __io min_mtu;
+ uint32_t __io rpm_dwrr_mtu;
+ uint32_t __io sdp_dwrr_mtu;
+ uint32_t __io lbk_dwrr_mtu;
+ uint32_t __io rsvd32[1];
+ uint64_t __io rsvd[15]; /* Add reserved fields for future expansion */
};
struct nix_bandprof_alloc_req {
diff --git a/drivers/common/cnxk/roc_nix.c b/drivers/common/cnxk/roc_nix.c
index 8fd8ec8461..2a320cc291 100644
--- a/drivers/common/cnxk/roc_nix.c
+++ b/drivers/common/cnxk/roc_nix.c
@@ -303,8 +303,15 @@ roc_nix_get_hw_info(struct roc_nix *roc_nix)
mbox_alloc_msg_nix_get_hw_info(mbox);
rc = mbox_process_msg(mbox, (void *)&hw_info);
- if (rc == 0)
+ if (rc == 0) {
nix->vwqe_interval = hw_info->vwqe_delay;
+ if (nix->lbk_link)
+ roc_nix->dwrr_mtu = hw_info->lbk_dwrr_mtu;
+ else if (nix->sdp_link)
+ roc_nix->dwrr_mtu = hw_info->sdp_dwrr_mtu;
+ else
+ roc_nix->dwrr_mtu = hw_info->rpm_dwrr_mtu;
+ }
return rc;
}
diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 5c2a869eba..1eb1c9af55 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -422,6 +422,7 @@ struct roc_nix {
uint32_t ipsec_in_min_spi;
uint32_t ipsec_in_max_spi;
uint32_t ipsec_out_max_sa;
+ uint32_t dwrr_mtu;
bool ipsec_out_sso_pffunc;
bool custom_sa_action;
/* End of input parameters */
diff --git a/drivers/common/cnxk/roc_nix_tm.c b/drivers/common/cnxk/roc_nix_tm.c
index 81fa6b1d93..86918990a2 100644
--- a/drivers/common/cnxk/roc_nix_tm.c
+++ b/drivers/common/cnxk/roc_nix_tm.c
@@ -256,10 +256,6 @@ nix_tm_node_add(struct roc_nix *roc_nix, struct
nix_tm_node *node)
if (node->weight > roc_nix_tm_max_sched_wt_get())
return NIX_ERR_TM_WEIGHT_EXCEED;
- /* Maintain minimum weight */
- if (!node->weight)
- node->weight = 1;
-
node->hw_lvl = nix_tm_lvl2nix(nix, lvl);
node->rr_prio = 0xF;
node->max_prio = UINT32_MAX;
@@ -1358,7 +1354,11 @@ nix_tm_prepare_default_tree(struct roc_nix *roc_nix)
node->id = nonleaf_id;
node->parent_id = parent;
node->priority = 0;
- node->weight = NIX_TM_DFLT_RR_WT;
+ /* Default VF root RR_QUANTUM is in sync with kernel */
+ if (lvl == ROC_TM_LVL_ROOT && !nix_tm_have_tl1_access(nix))
+ node->weight = 0;
+ else
+ node->weight = NIX_TM_DFLT_RR_WT;
node->shaper_profile_id = ROC_NIX_TM_SHAPER_PROFILE_NONE;
node->lvl = lvl;
node->tree = ROC_NIX_TM_DEFAULT;
diff --git a/drivers/common/cnxk/roc_nix_tm_utils.c
b/drivers/common/cnxk/roc_nix_tm_utils.c
index 193f9df5ff..d33e793664 100644
--- a/drivers/common/cnxk/roc_nix_tm_utils.c
+++ b/drivers/common/cnxk/roc_nix_tm_utils.c
@@ -644,9 +644,25 @@ nix_tm_topology_reg_prep(struct nix *nix, struct
nix_tm_node *node,
return k;
}
+static inline int
+nix_tm_default_rr_weight(struct nix *nix)
+{
+ struct roc_nix *roc_nix = nix_priv_to_roc_nix(nix);
+ uint32_t max_pktlen = roc_nix_max_pkt_len(roc_nix);
+ uint32_t weight;
+
+ /* Reduce TX VTAG Insertions */
+ max_pktlen -= 8;
+ weight = max_pktlen / roc_nix->dwrr_mtu;
+ if (max_pktlen % roc_nix->dwrr_mtu)
+ weight += 1;
+
+ return weight;
+}
+
uint8_t
-nix_tm_sched_reg_prep(struct nix *nix, struct nix_tm_node *node,
- volatile uint64_t *reg, volatile uint64_t *regval)
+nix_tm_sched_reg_prep(struct nix *nix, struct nix_tm_node *node, volatile
uint64_t *reg,
+ volatile uint64_t *regval)
{
uint64_t strict_prio = node->priority;
uint32_t hw_lvl = node->hw_lvl;
@@ -654,8 +670,14 @@ nix_tm_sched_reg_prep(struct nix *nix, struct nix_tm_node
*node,
uint64_t rr_quantum;
uint8_t k = 0;
- /* For CN9K, weight needs to be converted to quantum */
- rr_quantum = nix_tm_weight_to_rr_quantum(node->weight);
+ /* If minimum weight not provided, then by default RR_QUANTUM
+ * should be in sync with kernel, i.e., single MTU value
+ */
+ if (!node->weight)
+ rr_quantum = nix_tm_default_rr_weight(nix);
+ else
+ /* For CN9K, weight needs to be converted to quantum */
+ rr_quantum = nix_tm_weight_to_rr_quantum(node->weight);
/* For children to root, strict prio is default if either
* device root is TL2 or TL1 Static Priority is disabled.
@@ -666,8 +688,8 @@ nix_tm_sched_reg_prep(struct nix *nix, struct nix_tm_node
*node,
plt_tm_dbg("Schedule config node %s(%u) lvl %u id %u, "
"prio 0x%" PRIx64 ", rr_quantum/rr_wt 0x%" PRIx64 " (%p)",
- nix_tm_hwlvl2str(node->hw_lvl), schq, node->lvl, node->id,
- strict_prio, rr_quantum, node);
+ nix_tm_hwlvl2str(node->hw_lvl), schq, node->lvl, node->id,
strict_prio,
+ rr_quantum, node);
switch (hw_lvl) {
case NIX_TXSCH_LVL_SMQ:
--
2.25.1
