Hi Jacob,
> diff --git a/lib/librte_acl/rte_acl.c b/lib/librte_acl/rte_acl.c
> index d60219f..e2fdebd 100644
> --- a/lib/librte_acl/rte_acl.c
> +++ b/lib/librte_acl/rte_acl.c
> @@ -55,11 +55,32 @@ rte_acl_classify_avx2(__rte_unused const struct
> rte_acl_ctx *ctx,
> return -ENOTSUP;
> }
>
> +int __attribute__ ((weak))
> +rte_acl_classify_sse(__rte_unused const struct rte_acl_ctx *ctx,
> + __rte_unused const uint8_t **data,
> + __rte_unused uint32_t *results,
> + __rte_unused uint32_t num,
> + __rte_unused uint32_t categories)
> +{
> + return -ENOTSUP;
> +}
> +
> +int __attribute__ ((weak))
> +rte_acl_classify_neon(__rte_unused const struct rte_acl_ctx *ctx,
> + __rte_unused const uint8_t **data,
> + __rte_unused uint32_t *results,
> + __rte_unused uint32_t num,
> + __rte_unused uint32_t categories)
> +{
> + return -ENOTSUP;
> +}
> +
> static const rte_acl_classify_t classify_fns[] = {
> [RTE_ACL_CLASSIFY_DEFAULT] = rte_acl_classify_scalar,
> [RTE_ACL_CLASSIFY_SCALAR] = rte_acl_classify_scalar,
> [RTE_ACL_CLASSIFY_SSE] = rte_acl_classify_sse,
> [RTE_ACL_CLASSIFY_AVX2] = rte_acl_classify_avx2,
> + [RTE_ACL_CLASSIFY_NEON] = rte_acl_classify_neon,
> };
>
> /* by default, use always available scalar code path. */
> @@ -93,6 +114,9 @@ rte_acl_init(void)
> {
> enum rte_acl_classify_alg alg = RTE_ACL_CLASSIFY_DEFAULT;
>
> +#ifdef RTE_ARCH_ARM64
> + alg = RTE_ACL_CLASSIFY_NEON;
> +#else
On ARM, is there any specific cpu flag that you can use to determine is NEON
isa is supported or not?
It would be good to avoid extra conditional compilation here if possible.
Another question - did I get it right that NEON isa is supported on all
possible RTE_ARCH_ARM64 cpu models you plan to support?
Konstantin
