On Wed, Nov 4, 2015 at 9:45 AM, Cunming Liang <cunming.liang at intel.com>
wrote:
> During VFIO_DEVICE_SET_IRQS, the previous order is {Q0_fd, ... Qn_fd,
> misc_fd}.
> The vector number of misc is indeterminable which is ugly to some NIC(e.g.
> i40e, fm10k).
> The patch adjusts the order in {misc_fd, Q0_fd, ... Qn_fd}, always reserve
> the first vector to misc interrupt.
>
> v3 changes:
> - rename MISC_VEC_ID to RTE_INTR_VEC_ZERO_OFFSET
> - rename RX_VEC_START to RTE_INTR_VEC_RXTX_OFFSET
> - add macro definition in bsd header file
>
> Signed-off-by: Cunming Liang <cunming.liang at intel.com>
>
Acked-by: David Marchand <david.marchand at 6wind.com>
--
David Marchand
