Hello Konstantin, thank you for those hints! I reworked the code a little bit - refactored the LPM vector operations into rte_vect.h which helped to the ACL library as well. I will sort it out a little and send the v3 of the series. The LPM and ACL now seem to be much more sane on ARM.
Regards Jan On Tue, 27 Oct 2015 15:55:48 +0000 "Ananyev, Konstantin" <konstantin.ananyev at intel.com> wrote: > > -----Original Message----- > > From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Jan Viktorin > > Sent: Monday, October 26, 2015 4:38 PM > > To: Thomas Monjalon; Hunt, David; dev at dpdk.org > > Subject: [dpdk-dev] [PATCH v2 16/16] acl: check for SSE 4.1 support > > > > The main goal of this check is to avoid passing the -msse4.1 > > option to the GCC that does not support it (like arm toolchains). > > > > Anyway, the ACL library does not compile on ARM. > > > > Signed-off-by: Jan Viktorin <viktorin at rehivetech.com> > > --- > > lib/librte_acl/Makefile | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/lib/librte_acl/Makefile b/lib/librte_acl/Makefile > > index 7a1cf8a..401fb8c 100644 > > --- a/lib/librte_acl/Makefile > > +++ b/lib/librte_acl/Makefile > > @@ -50,7 +50,11 @@ SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_gen.c > > SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_scalar.c > > SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_sse.c > > > > +CC_SSE4_1_SUPPORT := $(shell $(CC) -msse4.1 -dM -E - < /dev/null > > >/dev/null 2>&1 && echo 1) > > + > > +ifeq ($(CC_SSE4_1_SUPPORT),1) > > CFLAGS_acl_run_sse.o += -msse4.1 > > +endif > > I don't think acl_run_sse.c would compile if SSE4_1 is not supported. > So, I think you need to do same thing, as is done for AVX2: > Compile in acl_run_sse.c only if SSE41 is supported by the compiler: > > - SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_sse.c > - > -CFLAGS_acl_run_sse.o += -msse4.1 > > +CC_SSE41_SUPPORT=$(shell $(CC) -msse4.1 -dM -E - </dev/null 2>&1 | \ > grep -q && echo 1) > +ifeq ($(CC_SSE41_SUPPORT), 1) > + SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_sse.c > + CFLAGS_rte_acl.o += -DCC_SSE41_SUPPORT > + CFLAGS_acl_run_sse.o += -msse4.1 > +endif > > And then change rte_acl_init() accordingly. > Something like: > > int __attribute__ ((weak)) > rte_acl_classify_sse(__rte_unused const struct rte_acl_ctx *ctx, > __rte_unused const uint8_t **data, > __rte_unused uint32_t *results, > __rte_unused uint32_t num, > __rte_unused uint32_t categories) > { > return -ENOTSUP; > } > > .... > > static void __attribute__((constructor)) > rte_acl_init(void) > { > enum rte_acl_classify_alg alg = RTE_ACL_CLASSIFY_DEFAULT; > > #if defined(CC_AVX2_SUPPORT) > if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2)) > alg = RTE_ACL_CLASSIFY_AVX2; > else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1)) > #elif defined (CC_SSE41_SUPPORT) > if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1)) > alg = RTE_ACL_CLASSIFY_SSE; > #endif > > rte_acl_set_default_classify(alg); > } > > After that, I suppose, you should be able to build and (probably use) > librte_acl on arm. > Konstantin > > > -- Jan Viktorin E-mail: Viktorin at RehiveTech.com System Architect Web: www.RehiveTech.com RehiveTech Brno, Czech Republic