From: Jesse Brandeburg <jesse.brandeb...@intel.com>
Fix a static analysis warning where if the 16-bit value in mask has the high-bit
set, it will be sign extended by the shift left (which converts it to a signed
integer). Avoid this by casting to a u32 to make sure the conversion happens
before the shift and that it stays unsigned.
Fixes: 9467486f179f ("net/ice/base: enable masking for RSS and FD field
vectors")
Cc: qi.z.zh...@intel.com
Cc: sta...@dpdk.org
Signed-off-by: Jesse Brandeburg <jesse.brandeb...@intel.com>
Signed-off-by: Ian Stokes <ian.sto...@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c
b/drivers/net/ice/base/ice_flex_pipe.c
index e06dbb0885..413b6f8ece 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1534,16 +1534,14 @@ ice_write_prof_mask_reg(struct ice_hw *hw, enum
ice_block blk, u16 mask_idx,
switch (blk) {
case ICE_BLK_RSS:
offset = GLQF_HMASK(mask_idx);
- val = (idx << GLQF_HMASK_MSK_INDEX_S) &
- GLQF_HMASK_MSK_INDEX_M;
- val |= (mask << GLQF_HMASK_MASK_S) & GLQF_HMASK_MASK_M;
+ val = (idx << GLQF_HMASK_MSK_INDEX_S) & GLQF_HMASK_MSK_INDEX_M;
+ val |= ((u32)mask << GLQF_HMASK_MASK_S) & GLQF_HMASK_MASK_M;
break;
case ICE_BLK_FD:
offset = GLQF_FDMASK(mask_idx);
val = (idx << GLQF_FDMASK_MSK_INDEX_S) &
GLQF_FDMASK_MSK_INDEX_M;
- val |= (mask << GLQF_FDMASK_MASK_S) &
- GLQF_FDMASK_MASK_M;
+ val |= ((u32)mask << GLQF_FDMASK_MASK_S) & GLQF_FDMASK_MASK_M;
break;
default:
ice_debug(hw, ICE_DBG_PKG, "No profile masks for block %d\n",
--
2.43.0
