On Tue, 2 May 2023 21:49:22 +0300
Alexander Kozyrev <akozy...@nvidia.com> wrote:
> The completion queue element size can be independently configured
> to report either 64 or 128 bytes CQEs by programming cqe_sz parameter
> at CQ creation. This parameter depends on the cache line size and
> affects both regular CQEs and error CQEs. But the error handling
> assumes that an error CQE is 64 bytes and doesn't take the padding
> into consideration on platforms with 128-byte cache lines.
> Fix the error CQE size in all error handling routines in mlx5.
>
> Fixes: 957e45fb7b ("net/mlx5: handle Tx completion with error")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Alexander Kozyrev <akozy...@nvidia.com>
I have no idea about internals of mlx5 but the concept seems fine.
Patch needs to be rebased.
Please title it with net/mlx5 not drivers.
