[PATCH v1 1/6] net/intel: update E830 Tx Time Queue Context Structure

[Soumyadeep Hore]

From: Paul Greenwalt <paul.greenw...@intel.com>

Updated the Tx Time Queue Context Structure to align with HAS.

Signed-off-by: Soumyadeep Hore <soumyadeep.h...@intel.com>
Signed-off-by: Paul Greenwalt <paul.greenw...@intel.com>
---
 drivers/net/intel/ice/base/ice_common.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/net/intel/ice/base/ice_common.c 
b/drivers/net/intel/ice/base/ice_common.c
index fce9b070cf..d6be991fe3 100644
--- a/drivers/net/intel/ice/base/ice_common.c
+++ b/drivers/net/intel/ice/base/ice_common.c
@@ -1671,17 +1671,17 @@ const struct ice_ctx_ele ice_txtime_ctx_info[] = {
        ICE_CTX_STORE(ice_txtime_ctx, cpuid,                    8,      82),
        ICE_CTX_STORE(ice_txtime_ctx, tphrd_desc,               1,      90),
        ICE_CTX_STORE(ice_txtime_ctx, qlen,                     13,     91),
-       ICE_CTX_STORE(ice_txtime_ctx, timer_num,                3,      104),
-       ICE_CTX_STORE(ice_txtime_ctx, txtime_ena_q,             1,      107),
-       ICE_CTX_STORE(ice_txtime_ctx, drbell_mode_32,           1,      108),
-       ICE_CTX_STORE(ice_txtime_ctx, ts_res,                   4,      109),
-       ICE_CTX_STORE(ice_txtime_ctx, ts_round_type,            2,      113),
-       ICE_CTX_STORE(ice_txtime_ctx, ts_pacing_slot,           3,      115),
-       ICE_CTX_STORE(ice_txtime_ctx, merging_ena,              1,      118),
-       ICE_CTX_STORE(ice_txtime_ctx, ts_fetch_prof_id,         4,      119),
-       ICE_CTX_STORE(ice_txtime_ctx, ts_fetch_cache_line_aln_thld, 4,  123),
-       ICE_CTX_STORE(ice_txtime_ctx, tx_pipe_delay_mode,       1,      127),
-       ICE_CTX_STORE(ice_txtime_ctx, int_q_state,              70,     128),
+       ICE_CTX_STORE(ice_txtime_ctx, timer_num,                1,      104),
+       ICE_CTX_STORE(ice_txtime_ctx, txtime_ena_q,             1,      105),
+       ICE_CTX_STORE(ice_txtime_ctx, drbell_mode_32,           1,      106),
+       ICE_CTX_STORE(ice_txtime_ctx, ts_res,                   4,      107),
+       ICE_CTX_STORE(ice_txtime_ctx, ts_round_type,            2,      111),
+       ICE_CTX_STORE(ice_txtime_ctx, ts_pacing_slot,           3,      113),
+       ICE_CTX_STORE(ice_txtime_ctx, merging_ena,              1,      116),
+       ICE_CTX_STORE(ice_txtime_ctx, ts_fetch_prof_id,         4,      117),
+       ICE_CTX_STORE(ice_txtime_ctx, ts_fetch_cache_line_aln_thld, 4,  121),
+       ICE_CTX_STORE(ice_txtime_ctx, tx_pipe_delay_mode,       1,      125),
+       ICE_CTX_STORE(ice_txtime_ctx, int_q_state,              70,     126),
        { 0 }
 };
 
-- 
2.43.0