Currently, the alignment requirements of the data address in mbuf is
64-byte on HIP08 platform. However, the GRO feature will be abnormal
in this case.

Many online applications already use 64-byte aligned. So a check is added
to avoid using the GRO function when 64-byte aligned is used.

Fixes: d14c995b775a ("net/hns3: check Rx DMA address alignmnent")
Cc: sta...@dpdk.org

Signed-off-by: Dengdui Huang <huangdeng...@huawei.com>
---
 drivers/net/hns3/hns3_rxtx.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
index bde46733b0..b7b9b9e3f2 100644
--- a/drivers/net/hns3/hns3_rxtx.c
+++ b/drivers/net/hns3/hns3_rxtx.c
@@ -281,6 +281,7 @@ hns3_free_all_queues(struct rte_eth_dev *dev)
 static int
 hns3_check_rx_dma_addr(struct hns3_hw *hw, uint64_t dma_addr)
 {
+       uint64_t rx_offload = hw->data->dev_conf.rxmode.offloads;
        uint64_t rem;
 
        rem = dma_addr & (hw->rx_dma_addr_align - 1);
@@ -289,6 +290,17 @@ hns3_check_rx_dma_addr(struct hns3_hw *hw, uint64_t 
dma_addr)
                         "must be %u-byte aligned", hw->rx_dma_addr_align);
                return -EINVAL;
        }
+
+       /*
+        * This check is for HIP08 network engine. The GRO function will be
+        * abnormal when mbuf DMA address is 64-byte aligned.
+        */
+       rem = dma_addr & (HNS3_RX_DMA_ADDR_ALIGN_128 - 1);
+       if ((rx_offload & RTE_ETH_RX_OFFLOAD_TCP_LRO) && rem > 0) {
+               hns3_err(hw, "Hardware GRO is not supported when mbuf DMA "
+                        "address is 64-byte aligned");
+               return -EINVAL;
+       }
        return 0;
 }
 
-- 
2.33.0

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