On 2025/6/10 14:42, huangdengdui wrote:
>
> On 2025/6/9 23:21, Stephen Hemminger wrote:
>> On Mon, 9 Jun 2025 09:58:27 +0000
>> Sivaprasad Tummala <sivaprasad.tumm...@amd.com> wrote:
>>
>>> Previously, the TX burst size was fixed at 256, leading to performance
>>> degradation in certain scenarios.
>>>
>>> This patch introduces logic to set the TX burst size to match the
>>> configured RX burst size (--burst option, default 32, max 512)
>>> for better efficiency.
>>>
>>> Fixes: d5c4897ecfb2 ("examples/l3fwd: add option to set Rx burst size")
>>> Cc: haij...@huawei.com
>>> Cc: sta...@dpdk.org
>>>
>>> Signed-off-by: Sivaprasad Tummala <sivaprasad.tumm...@amd.com>
>>> Tested-by: Venkat Kumar Ande <venkatkumar.a...@amd.com>
>>> Tested-by: Dengdui Huang <huangdeng...@huawei.com>
>>
>> What driver? Why not fix the driver.
>> If RX burst is small, there should be no way to get TX burst larger
>> than that to happen.
>
> If the Tx burst is too large, a number of mbufs will be temporarily stored in
> l3fwd's mbuf_table in a short period of time.
> This leads to a decrease in the hit rate of the mempool cache, resulting in a
> drop in performance.
This commit introduce coupling in Tx burst size and Rx burst size.
Different arch may have differ combination for Rx/Tx burst and descriptors.
So how about add one extra option for Tx burst size, and default the same with
MAX_PKT_BURST.
>
