Add RX desc merge mode for Amber-Lite NICs. When enabled, the hardware batch-processes RX packets, significantly enhancing performance. This feature is enabled by default in the driver and can be configured via the rx_desc_merge parameter in devargs.
Signed-off-by: Zaiyu Wang <[email protected]> --- drivers/net/txgbe/base/txgbe_regs.h | 4 ++++ drivers/net/txgbe/base/txgbe_type.h | 3 +++ drivers/net/txgbe/txgbe_ethdev.c | 7 ++++++- drivers/net/txgbe/txgbe_rxtx.c | 11 +++++++++++ 4 files changed, 24 insertions(+), 1 deletion(-) diff --git a/drivers/net/txgbe/base/txgbe_regs.h b/drivers/net/txgbe/base/txgbe_regs.h index 1a544bcd57..e050941992 100644 --- a/drivers/net/txgbe/base/txgbe_regs.h +++ b/drivers/net/txgbe/base/txgbe_regs.h @@ -1377,6 +1377,7 @@ enum txgbe_5tuple_protocol { #define TXGBE_RXCFG_HDRLEN(v) LS(HDRLEN(v), 12, 0xF) #define TXGBE_RXCFG_HDRLEN_MASK MS(12, 0xF) #define TXGBE_RXCFG_WTHRESH(v) LS(v, 16, 0x7) +#define TXGBE_RXCFG_DESC_MERGE MS(19, 0x1) #define TXGBE_RXCFG_ETAG MS(22, 0x1) #define TXGBE_RXCFG_RSCMAX_MASK MS(23, 0x3) #define TXGBE_RXCFG_RSCMAX_1 LS(0, 23, 0x3) @@ -1671,6 +1672,9 @@ enum txgbe_5tuple_protocol { #define TXGBE_RPUP2TC_UP_SHIFT 3 #define TXGBE_RPUP2TC_UP_MASK 0x7 +#define TXGBE_RDM_DCACHE_CTL 0x0120A8 +#define TXGBE_RDM_DCACHE_CTL_EN MS(0, 0x1) + /* mac switcher */ #define TXGBE_ETHADDRL 0x016200 #define TXGBE_ETHADDRL_AD0(v) LS(v, 0, 0xFF) diff --git a/drivers/net/txgbe/base/txgbe_type.h b/drivers/net/txgbe/base/txgbe_type.h index 844a2827bc..03e5bd489d 100644 --- a/drivers/net/txgbe/base/txgbe_type.h +++ b/drivers/net/txgbe/base/txgbe_type.h @@ -718,6 +718,7 @@ struct txgbe_phy_info { #define TXGBE_DEVARG_FFE_POST "ffe_post" #define TXGBE_DEVARG_TX_HEAD_WB "tx_headwb" #define TXGBE_DEVARG_TX_HEAD_WB_SIZE "tx_headwb_size" +#define TXGBE_DEVARG_RX_DESC_MERGE "rx_desc_merge" static const char * const txgbe_valid_arguments[] = { TXGBE_DEVARG_BP_AUTO, @@ -730,6 +731,7 @@ static const char * const txgbe_valid_arguments[] = { TXGBE_DEVARG_FFE_POST, TXGBE_DEVARG_TX_HEAD_WB, TXGBE_DEVARG_TX_HEAD_WB_SIZE, + TXGBE_DEVARG_RX_DESC_MERGE, NULL }; @@ -782,6 +784,7 @@ struct txgbe_devargs { u16 sgmii; u16 tx_headwb; u16 tx_headwb_size; + u16 rx_desc_merge; }; struct txgbe_hw { diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index 9c14e4b8ed..13d1d6924d 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -516,6 +516,7 @@ txgbe_parse_devargs(struct txgbe_hw *hw, struct rte_devargs *devargs) /* New devargs for amberlite config */ u16 tx_headwb = 1; u16 tx_headwb_size = 16; + u16 rx_desc_merge = 1; if (devargs == NULL) goto null; @@ -544,6 +545,8 @@ txgbe_parse_devargs(struct txgbe_hw *hw, struct rte_devargs *devargs) &txgbe_handle_devarg, &tx_headwb); rte_kvargs_process(kvlist, TXGBE_DEVARG_TX_HEAD_WB_SIZE, &txgbe_handle_devarg, &tx_headwb_size); + rte_kvargs_process(kvlist, TXGBE_DEVARG_RX_DESC_MERGE, + &txgbe_handle_devarg, &rx_desc_merge); rte_kvargs_free(kvlist); null: @@ -553,6 +556,7 @@ txgbe_parse_devargs(struct txgbe_hw *hw, struct rte_devargs *devargs) hw->devarg.sgmii = sgmii; hw->devarg.tx_headwb = tx_headwb; hw->devarg.tx_headwb_size = tx_headwb_size; + hw->devarg.rx_desc_merge = rx_desc_merge; hw->phy.ffe_set = ffe_set; hw->phy.ffe_main = ffe_main; hw->phy.ffe_pre = ffe_pre; @@ -5729,7 +5733,8 @@ RTE_PMD_REGISTER_PARAM_STRING(net_txgbe, TXGBE_DEVARG_FFE_PRE "=<uint16>" TXGBE_DEVARG_FFE_POST "=<uint16>" TXGBE_DEVARG_TX_HEAD_WB "=<0|1>" - TXGBE_DEVARG_TX_HEAD_WB_SIZE "=<1|16>"); + TXGBE_DEVARG_TX_HEAD_WB_SIZE "=<1|16>" + TXGBE_DEVARG_RX_DESC_MERGE "=<0|1>"); RTE_LOG_REGISTER_SUFFIX(txgbe_logtype_init, init, NOTICE); RTE_LOG_REGISTER_SUFFIX(txgbe_logtype_driver, driver, NOTICE); diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c index 219f4c242a..9c2b740d2a 100644 --- a/drivers/net/txgbe/txgbe_rxtx.c +++ b/drivers/net/txgbe/txgbe_rxtx.c @@ -4667,6 +4667,17 @@ txgbe_dev_rx_init(struct rte_eth_dev *dev) buf_size = ROUND_DOWN(buf_size, 0x1 << 10); srrctl |= TXGBE_RXCFG_PKTLEN(buf_size); + if ((hw->mac.type == txgbe_mac_aml || + hw->mac.type == txgbe_mac_aml40) && hw->devarg.rx_desc_merge == 1) { + srrctl |= TXGBE_RXCFG_DESC_MERGE; + + wr32(hw, TXGBE_RDM_DCACHE_CTL, TXGBE_RDM_DCACHE_CTL_EN); + wr32m(hw, TXGBE_RDM_RSC_CTL, TXGBE_RDM_RSC_CTL_FREE_CTL, + TXGBE_RDM_RSC_CTL_FREE_CTL); + wr32m(hw, TXGBE_RDM_RSC_CTL, TXGBE_RDM_RSC_CTL_FREE_CNT_DIS, + ~TXGBE_RDM_RSC_CTL_FREE_CNT_DIS); + } + wr32(hw, TXGBE_RXCFG(rxq->reg_idx), srrctl); /* It adds dual VLAN length for supporting dual VLAN */ -- 2.21.0.windows.1
