Aligning CPTR to 256B for TLS cases.
Signed-off-by: Tejasree Kondoj <[email protected]>
---
drivers/common/cnxk/roc_cpt.c | 4 +--
drivers/crypto/cnxk/cn20k_tls.c | 47 +++++++++++++++++++++++------
drivers/crypto/cnxk/cn20k_tls.h | 15 ++++++---
drivers/crypto/cnxk/cn20k_tls_ops.h | 6 +++-
4 files changed, 55 insertions(+), 17 deletions(-)
diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index 83e0c9896b..0deb0b52d5 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -1275,8 +1275,8 @@ roc_cpt_ctx_write(struct roc_cpt_lf *lf, void *sa_dptr,
void *sa_cptr,
uint8_t egrp;
int i;
- if (!plt_is_aligned(sa_cptr, 128)) {
- plt_err("Context pointer should be 128B aligned");
+ if (!plt_is_aligned(sa_cptr, ROC_CPTR_ALIGN)) {
+ plt_err("Context pointer should be %dB aligned",
ROC_CPTR_ALIGN);
return -EINVAL;
}
diff --git a/drivers/crypto/cnxk/cn20k_tls.c b/drivers/crypto/cnxk/cn20k_tls.c
index 9f7acefc19..8556a95ab6 100644
--- a/drivers/crypto/cnxk/cn20k_tls.c
+++ b/drivers/crypto/cnxk/cn20k_tls.c
@@ -385,13 +385,20 @@ cn20k_tls_read_sa_create(struct roc_cpt *roc_cpt, struct
roc_cpt_lf *lf,
int ret = 0;
tls = &sec_sess->tls_rec;
- read_sa = &tls->read_sa;
+
+ read_sa = rte_zmalloc("cn20k_tls", sizeof(struct
roc_ie_ow_tls_read_sa), ROC_CPTR_ALIGN);
+ if (read_sa == NULL) {
+ plt_err("Couldn't allocate memory for READ SA");
+ return -ENOMEM;
+ }
+ tls->read_sa = read_sa;
/* Allocate memory to be used as dptr for CPT ucode WRITE_SA op */
sa_dptr = plt_zmalloc(sizeof(struct roc_ie_ow_tls_read_sa), 8);
if (sa_dptr == NULL) {
plt_err("Could not allocate memory for SA dptr");
- return -ENOMEM;
+ ret = -ENOMEM;
+ goto sa_cptr_free;
}
/* Translate security parameters to SA */
@@ -457,6 +464,11 @@ cn20k_tls_read_sa_create(struct roc_cpt *roc_cpt, struct
roc_cpt_lf *lf,
sa_dptr_free:
plt_free(sa_dptr);
+sa_cptr_free:
+ if (ret != 0) {
+ rte_free(read_sa);
+ read_sa = NULL;
+ }
return ret;
}
@@ -706,13 +718,20 @@ cn20k_tls_write_sa_create(struct roc_cpt *roc_cpt, struct
roc_cpt_lf *lf,
int ret = 0;
tls = &sec_sess->tls_rec;
- write_sa = &tls->write_sa;
+
+ write_sa = rte_zmalloc("cn20k_tls", sizeof(struct
roc_ie_ow_tls_write_sa), ROC_CPTR_ALIGN);
+ if (write_sa == NULL) {
+ plt_err("Couldn't allocate memory for WRITE SA");
+ return -ENOMEM;
+ }
+ tls->write_sa = write_sa;
/* Allocate memory to be used as dptr for CPT ucode WRITE_SA op */
sa_dptr = plt_zmalloc(sizeof(struct roc_ie_ow_tls_write_sa), 8);
if (sa_dptr == NULL) {
plt_err("Could not allocate memory for SA dptr");
- return -ENOMEM;
+ ret = -ENOMEM;
+ goto sa_cptr_free;
}
/* Translate security parameters to SA */
@@ -781,6 +800,11 @@ cn20k_tls_write_sa_create(struct roc_cpt *roc_cpt, struct
roc_cpt_lf *lf,
sa_dptr_free:
plt_free(sa_dptr);
+sa_cptr_free:
+ if (ret != 0) {
+ rte_free(write_sa);
+ write_sa = NULL;
+ }
return ret;
}
@@ -868,15 +892,18 @@ cn20k_sec_tls_session_destroy(struct cnxk_cpt_qp *qp,
struct cn20k_sec_session *
tls = &sess->tls_rec;
+ if (tls->sa_ptr == NULL)
+ return -EINVAL;
+
/* Trigger CTX flush to write dirty data back to DRAM */
- roc_cpt_lf_ctx_flush(lf, &tls->read_sa, false);
+ roc_cpt_lf_ctx_flush(lf, tls->read_sa, false);
if (sess->tls_opt.is_write) {
sa_dptr = plt_zmalloc(sizeof(struct roc_ie_ow_tls_write_sa), 8);
if (sa_dptr != NULL) {
tls_write_sa_init(sa_dptr);
- ret = roc_cpt_ctx_write(lf, sa_dptr, &tls->write_sa,
+ ret = roc_cpt_ctx_write(lf, sa_dptr, tls->write_sa,
sizeof(struct
roc_ie_ow_tls_write_sa));
plt_free(sa_dptr);
}
@@ -889,14 +916,14 @@ cn20k_sec_tls_session_destroy(struct cnxk_cpt_qp *qp,
struct cn20k_sec_session *
rte_atomic_thread_fence(rte_memory_order_seq_cst);
/* Trigger CTX reload to fetch new data from DRAM */
- roc_cpt_lf_ctx_reload(lf, &tls->write_sa);
+ roc_cpt_lf_ctx_reload(lf, tls->write_sa);
}
} else {
sa_dptr = plt_zmalloc(sizeof(struct roc_ie_ow_tls_read_sa), 8);
if (sa_dptr != NULL) {
tls_read_sa_init(sa_dptr);
- ret = roc_cpt_ctx_write(lf, sa_dptr, &tls->read_sa,
+ ret = roc_cpt_ctx_write(lf, sa_dptr, tls->read_sa,
sizeof(struct
roc_ie_ow_tls_read_sa));
plt_free(sa_dptr);
}
@@ -909,9 +936,11 @@ cn20k_sec_tls_session_destroy(struct cnxk_cpt_qp *qp,
struct cn20k_sec_session *
rte_atomic_thread_fence(rte_memory_order_seq_cst);
/* Trigger CTX reload to fetch new data from DRAM */
- roc_cpt_lf_ctx_reload(lf, &tls->read_sa);
+ roc_cpt_lf_ctx_reload(lf, tls->read_sa);
}
}
+ rte_free(tls->sa_ptr);
+
return 0;
}
diff --git a/drivers/crypto/cnxk/cn20k_tls.h b/drivers/crypto/cnxk/cn20k_tls.h
index 27124602a0..5fed749545 100644
--- a/drivers/crypto/cnxk/cn20k_tls.h
+++ b/drivers/crypto/cnxk/cn20k_tls.h
@@ -16,13 +16,18 @@
/* Forward declaration */
struct cn20k_sec_session;
-struct __rte_aligned(ROC_ALIGN) cn20k_tls_record
+struct __rte_aligned(ROC_CPTR_ALIGN) cn20k_tls_record
{
union {
- /** Read SA */
- struct roc_ie_ow_tls_read_sa read_sa;
- /** Write SA */
- struct roc_ie_ow_tls_write_sa write_sa;
+ void *sa_ptr;
+ struct {
+ union {
+ /** Read SA */
+ struct roc_ie_ow_tls_read_sa *read_sa;
+ /** Write SA */
+ struct roc_ie_ow_tls_write_sa *write_sa;
+ };
+ };
};
};
diff --git a/drivers/crypto/cnxk/cn20k_tls_ops.h
b/drivers/crypto/cnxk/cn20k_tls_ops.h
index 9f70a1d42d..e7a8ba34ae 100644
--- a/drivers/crypto/cnxk/cn20k_tls_ops.h
+++ b/drivers/crypto/cnxk/cn20k_tls_ops.h
@@ -38,7 +38,11 @@ process_tls_write(struct roc_cpt_lf *lf, struct
rte_crypto_op *cop, struct cn20k
pad_len = (pad_bytes >> tls_opt.pad_shift) * tls_opt.enable_padding;
#ifdef LA_IPSEC_DEBUG
- write_sa = &sess->tls_rec.write_sa;
+ write_sa = sess->tls_rec.write_sa;
+ if (write_sa == NULL) {
+ return -EINVAL;
+ }
+
if (write_sa->w2.s.iv_at_cptr == ROC_IE_OW_TLS_IV_SRC_FROM_SA) {
uint8_t *iv = PLT_PTR_ADD(write_sa->cipher_key, 32);
--
2.25.1
