Hi,

> -----Original Message-----
> From: Vincent Jardin <[email protected]>
> Sent: Friday, March 13, 2026 12:01 AM
> To: [email protected]
> Cc: Raslan Darawsheh <[email protected]>; NBU-Contact-Thomas Monjalon
> (EXTERNAL) <[email protected]>; [email protected];
> Dariusz Sosnowski <[email protected]>; Slava Ovsiienko
> <[email protected]>; Bing Zhao <[email protected]>; Ori Kam
> <[email protected]>; Suanming Mou <[email protected]>; Matan Azrad
> <[email protected]>; [email protected]; Vincent Jardin
> <[email protected]>
> Subject: [PATCH v3 03/9] common/mlx5: extend SQ modify to support rate limit
> update
> 
> Add rl_update and packet_pacing_rate_limit_index fields to
> mlx5_devx_modify_sq_attr. When rl_update is set, the modify SQ command
> sets modify_bitmask bit 0 and writes the PP index into the SQ context, 
> allowing
> dynamic rate changes on a live RDY SQ without teardown.
> 
> modify_sq_in.modify_bitmask[0x40] bit 0 controls the
> packet_pacing_rate_limit_index.
> 
> Supported hardware:
> - ConnectX-6 Dx: per-SQ rate via packet_pacing_rate_limit_index
> - ConnectX-7/8: same SQ context field, also supports wait-on-time
> - BlueField-2/3: same modify_sq command support
> 
> Not supported:
> - ConnectX-5: supports packet_pacing but only at SQ creation time,
>   dynamic modify_bitmask update may not be supported on all FW
> - ConnectX-4 Lx and earlier: no packet_pacing support
> 
> Signed-off-by: Vincent Jardin <[email protected]>
> ---
>  drivers/common/mlx5/mlx5_devx_cmds.c | 5 +++++
> drivers/common/mlx5/mlx5_devx_cmds.h | 3 +++
>  2 files changed, 8 insertions(+)
> 
> diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c
> b/drivers/common/mlx5/mlx5_devx_cmds.c
> index 8f53303fa7..17378e1753 100644
> --- a/drivers/common/mlx5/mlx5_devx_cmds.c
> +++ b/drivers/common/mlx5/mlx5_devx_cmds.c
> @@ -2129,6 +2129,11 @@ mlx5_devx_cmd_modify_sq(struct mlx5_devx_obj
> *sq,
>       MLX5_SET(sqc, sq_ctx, state, sq_attr->state);
>       MLX5_SET(sqc, sq_ctx, hairpin_peer_rq, sq_attr->hairpin_peer_rq);
>       MLX5_SET(sqc, sq_ctx, hairpin_peer_vhca, sq_attr-
> >hairpin_peer_vhca);
> +     if (sq_attr->rl_update) {
> +             MLX5_SET64(modify_sq_in, in, modify_bitmask, 1);

1. Please define enum for the bit: 
MLX5_MODIFY_SQ_IN_MODIFY_BITMASK_PACKET_PACING_RATE_LIMIT_INDEX
(please see MLX5_MODIFY_RQ_IN_MODIFY_xxx enum). Also no objections to define 
enums for other
MLX5_MODIFY_SQ_IN_MODIFY_BITMASK _xxx.

2. Please modify only the involved bits in the bitmask:

uint64_t bitmask;

bitmask = MLX5_GET64(modify_sq_in, in, modify_bitmask);
bitmask |= MLX5_MODIFY_SQ_IN_MODIFY_BITMASK_PACKET_PACING_RATE_LIMIT_INDEX;
MLX5_SET64(modify_sq_in, in, modify_bitmask, bitmask);

This would improve compatibility for the case bitmask is set somewhere before 
the "if (sq_attr->rl_update)".

With best regards,
Slava


> +             MLX5_SET(sqc, sq_ctx, packet_pacing_rate_limit_index,
> +                      sq_attr->packet_pacing_rate_limit_index);
> +     }
>       ret = mlx5_glue->devx_obj_modify(sq->obj, in, sizeof(in),
>                                        out, sizeof(out));
>       if (ret) {
> diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h
> b/drivers/common/mlx5/mlx5_devx_cmds.h
> index 930ae2c072..82d949972b 100644
> --- a/drivers/common/mlx5/mlx5_devx_cmds.h
> +++ b/drivers/common/mlx5/mlx5_devx_cmds.h
> @@ -519,6 +519,9 @@ struct mlx5_devx_modify_sq_attr {
>       uint32_t state:4;
>       uint32_t hairpin_peer_rq:24;
>       uint32_t hairpin_peer_vhca:16;
> +     uint32_t rl_update:1;
> +     /* Set to update packet_pacing_rate_limit_index on a live SQ. */
> +     uint32_t packet_pacing_rate_limit_index:16;
>  };
> 
> 
> --
> 2.43.0

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