Convert the legacy rte_atomic32_t and rte_atomic32_{inc,dec,set,read}
macros to C11 stdatomic equivalents. This clears another user of the
rte_atomicNN_*() family ahead of its deprecation.Memory ordering is kept at seq_cst, matching the implicit ordering of the legacy API. The ena_com access patterns can be audited and orderings tightened in a follow-up. Signed-off-by: Stephen Hemminger <[email protected]> --- drivers/net/ena/base/ena_plat_dpdk.h | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/net/ena/base/ena_plat_dpdk.h b/drivers/net/ena/base/ena_plat_dpdk.h index c84420de22..83b354d9da 100644 --- a/drivers/net/ena/base/ena_plat_dpdk.h +++ b/drivers/net/ena/base/ena_plat_dpdk.h @@ -40,7 +40,7 @@ typedef uint64_t dma_addr_t; #endif #define ENA_PRIu64 PRIu64 -#define ena_atomic32_t rte_atomic32_t +typedef RTE_ATOMIC(int32_t) ena_atomic32_t; #define ena_mem_handle_t const struct rte_memzone * #define SZ_256 (256U) @@ -267,10 +267,14 @@ ena_mem_alloc_coherent(struct rte_eth_dev_data *data, size_t size, #define ENA_REG_READ32(bus, reg) \ __extension__ ({ (void)(bus); rte_read32_relaxed((reg)); }) -#define ATOMIC32_INC(i32_ptr) rte_atomic32_inc(i32_ptr) -#define ATOMIC32_DEC(i32_ptr) rte_atomic32_dec(i32_ptr) -#define ATOMIC32_SET(i32_ptr, val) rte_atomic32_set(i32_ptr, val) -#define ATOMIC32_READ(i32_ptr) rte_atomic32_read(i32_ptr) +#define ATOMIC32_INC(i32_ptr) \ + rte_atomic_fetch_add_explicit((i32_ptr), 1, rte_memory_order_seq_cst) +#define ATOMIC32_DEC(i32_ptr) \ + rte_atomic_fetch_sub_explicit((i32_ptr), 1, rte_memory_order_seq_cst) +#define ATOMIC32_SET(i32_ptr, val) \ + rte_atomic_store_explicit((i32_ptr), (val), rte_memory_order_seq_cst) +#define ATOMIC32_READ(i32_ptr) \ + rte_atomic_load_explicit((i32_ptr), rte_memory_order_seq_cst) #define msleep(x) rte_delay_us(x * 1000) #define udelay(x) rte_delay_us(x) -- 2.53.0
