On Mon, Jun 22, 2026 at 02:06:55PM +0200, David Marchand wrote: > On Mon, 25 May 2026 at 20:43, Raghavendra Ningoji > <[email protected]> wrote: > > > > Add the skeleton of a new dmadev poll-mode driver for the AMD AE4DMA > > hardware DMA engine, providing only PCI probe/remove and per-queue > > hardware initialisation. An AE4DMA engine exposes 16 hardware command > > queues, each with a 32-entry descriptor ring; the PMD maps each > > hardware channel to its own dmadev with a single virtual channel, > > so a PCI function appears as 16 dmadevs named "<pci-bdf>-ch0" .. > > "<pci-bdf>-ch15". > > I am not familiar with DMA drivers, I am not sure it is something acceptable. > @Chengwen for info. > This is similar with what is done by idxd driver when used as a PCI device bound to vfio. We make the number of channels to configure a devarg, and each channel becomes its own dmadev instance, since each channel is independent from a user viewpoint. Only difference is that we use "q" rather than "ch" in the naming. See [1] for what idxd does.
/Bruce [1] https://github.com/DPDK/dpdk/blob/main/drivers/dma/idxd/idxd_pci.c#L326
