Add QAT_ASYM_RSA_CAP macro to report RSA asymmetric capabilities using rsa_capa, including modulus length and padding schemes.
Update Gen1 and Gen4 QAT asymmetric PMDs to advertise RTE_CRYPTO_RSA_PADDING_NONE via pad_types, matching the padding mode supported by the QAT RSA implementation. Signed-off-by: Sucharitha Sarananaga <[email protected]> --- drivers/crypto/qat/asym/qat_asym.h | 20 ++++++++++++++++++++ drivers/crypto/qat/dev/qat_asym_pmd_gen1.c | 5 +++-- drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c | 5 +++-- 3 files changed, 26 insertions(+), 4 deletions(-) diff --git a/drivers/crypto/qat/asym/qat_asym.h b/drivers/crypto/qat/asym/qat_asym.h index 0ecbc47548..cf40d445df 100644 --- a/drivers/crypto/qat/asym/qat_asym.h +++ b/drivers/crypto/qat/asym/qat_asym.h @@ -56,6 +56,26 @@ typedef uint64_t large_int_ptr; } \ } +#define QAT_ASYM_RSA_CAP(o, l, r, i, p) \ + { \ + .op = RTE_CRYPTO_OP_TYPE_ASYMMETRIC, \ + {.asym = { \ + .xform_capa = { \ + .xform_type = RTE_CRYPTO_ASYM_XFORM_RSA, \ + .op_types = o, \ + .rsa_capa = { \ + .modlen = { \ + .min = l, \ + .max = r, \ + .increment = i \ + }, \ + .pad_types = p, \ + }, \ + } \ + }, \ + } \ + } + struct __rte_aligned(8) qat_asym_op_cookie { uint64_t error; uint32_t alg_bytesize; /* Bytesize of algorithm */ diff --git a/drivers/crypto/qat/dev/qat_asym_pmd_gen1.c b/drivers/crypto/qat/dev/qat_asym_pmd_gen1.c index c96608dd37..5b93cf374b 100644 --- a/drivers/crypto/qat/dev/qat_asym_pmd_gen1.c +++ b/drivers/crypto/qat/dev/qat_asym_pmd_gen1.c @@ -32,12 +32,13 @@ static struct rte_cryptodev_capabilities qat_asym_crypto_caps_gen1[] = { 0, 1, 512, 1), QAT_ASYM_CAP(MODINV, 0, 1, 512, 1), - QAT_ASYM_CAP(RSA, + QAT_ASYM_RSA_CAP( ((1 << RTE_CRYPTO_ASYM_OP_SIGN) | (1 << RTE_CRYPTO_ASYM_OP_VERIFY) | (1 << RTE_CRYPTO_ASYM_OP_ENCRYPT) | (1 << RTE_CRYPTO_ASYM_OP_DECRYPT)), - 64, 512, 64), + 64, 512, 64, + (1 << RTE_CRYPTO_RSA_PADDING_NONE)), QAT_ASYM_CAP(ECDH, ((1 << RTE_CRYPTO_ASYM_KE_PUB_KEY_GENERATE) | (1 << RTE_CRYPTO_ASYM_KE_SHARED_SECRET_COMPUTE) | diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c index 41cad29142..106c512a06 100644 --- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c +++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c @@ -121,12 +121,13 @@ static struct rte_cryptodev_capabilities qat_asym_crypto_caps_gen4[] = { 0, 1, 512, 1), QAT_ASYM_CAP(MODINV, 0, 1, 512, 1), - QAT_ASYM_CAP(RSA, + QAT_ASYM_RSA_CAP( ((1 << RTE_CRYPTO_ASYM_OP_SIGN) | (1 << RTE_CRYPTO_ASYM_OP_VERIFY) | (1 << RTE_CRYPTO_ASYM_OP_ENCRYPT) | (1 << RTE_CRYPTO_ASYM_OP_DECRYPT)), - 64, 512, 64), + 64, 512, 64, + (1 << RTE_CRYPTO_RSA_PADDING_NONE)), { /* SM2 */ .op = RTE_CRYPTO_OP_TYPE_ASYMMETRIC, {.asym = { -- 2.54.0
