On 1/28/2016 10:44 AM, Tetsuya Mukawa wrote: > On 2016/01/27 19:03, Xie, Huawei wrote: >> On 1/21/2016 7:09 PM, Tetsuya Mukawa wrote: >>> + /* Set BAR region */ >>> + for (i = 0; i < NB_BAR; i++) { >>> + switch (dev->bar[i].type) { >>> + case QTEST_PCI_BAR_IO: >>> + case QTEST_PCI_BAR_MEMORY_UNDER_1MB: >>> + case QTEST_PCI_BAR_MEMORY_32: >>> + qtest_pci_outl(s, bus, device, 0, dev->bar[i].addr, >>> + dev->bar[i].region_start); >>> + PMD_DRV_LOG(INFO, "Set BAR of %s device: 0x%lx - >>> 0x%lx\n", >>> + dev->name, dev->bar[i].region_start, >>> + dev->bar[i].region_start + >>> dev->bar[i].region_size); >>> + break; >>> + case QTEST_PCI_BAR_MEMORY_64: >>> + qtest_pci_outq(s, bus, device, 0, dev->bar[i].addr, >>> + dev->bar[i].region_start); >>> + PMD_DRV_LOG(INFO, "Set BAR of %s device: 0x%lx - >>> 0x%lx\n", >>> + dev->name, dev->bar[i].region_start, >>> + dev->bar[i].region_start + >>> dev->bar[i].region_size); >>> + break; >> Hasn't the bar resource already been allocated? Is it the app's >> responsibility to allocate the bar resource in qtest mode? The app >> couldn't have that knowledge. > Yes. In qtest mode, the app should register above values. > (Without it, default values are 0) > Usually, this will be done by BIOS or uEFI. But in qtest mode, these > will not be invoked. > So we need to define above values, and also need to enable PCI devices. > > In this release, I just register hard coded values except for one of > ivshmem BAR. > In next release, I will describe memory map in comment.
I think ideally this app should do the whole PCI system initialization(and also the north/south bridge) using the DFS algorithm on behalf of the BIOS, to allocate resource for all bridge and devices. Otherwise if QEMU follows the hardware platform's behavior to route MMIO/IO access, if we only allocate resources for part of the devices, the transactions could not be routed correctly. Anyway we shouldn't bother us. It is OK as long as it works. > > Tetsuya > >