Add code branch for 25G link speed,
so 25G device will be functional.
Signed-off-by: Zhang Qi <qi.z.zhang at intel.com>
---
drivers/net/i40e/i40e_ethdev.c | 23 ++++++++++++++++++-----
1 file changed, 18 insertions(+), 5 deletions(-)
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index fc7e128..e5b6554 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -1567,6 +1567,8 @@ i40e_parse_link_speeds(uint16_t link_speeds)
if (link_speeds & ETH_LINK_SPEED_40G)
link_speed |= I40E_LINK_SPEED_40GB;
+ if (link_speeds & ETH_LINK_SPEED_25G)
+ link_speed |= I40E_LINK_SPEED_25GB;
if (link_speeds & ETH_LINK_SPEED_20G)
link_speed |= I40E_LINK_SPEED_20GB;
if (link_speeds & ETH_LINK_SPEED_10G)
@@ -1592,6 +1594,7 @@ i40e_phy_conf_link(struct i40e_hw *hw,
I40E_AQ_PHY_FLAG_PAUSE_RX |
I40E_AQ_PHY_FLAG_LOW_POWER;
const uint8_t advt = I40E_LINK_SPEED_40GB |
+ I40E_LINK_SPEED_25GB |
I40E_LINK_SPEED_10GB |
I40E_LINK_SPEED_1GB |
I40E_LINK_SPEED_100MB;
@@ -1644,7 +1647,8 @@ i40e_apply_link_speed(struct rte_eth_dev *dev)
struct rte_eth_conf *conf = &dev->data->dev_conf;
enum i40e_aq_link_speed link_speed =
i40e_get_link_speed_by_devid(hw->device_id);
speed = i40e_parse_link_speeds(conf->link_speeds);
- abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
+ if (link_speed != I40E_LINK_SPEED_25GB)
+ abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
if (!(conf->link_speeds & ETH_LINK_SPEED_FIXED))
abilities |= I40E_AQ_PHY_AN_ENABLED;
abilities |= I40E_AQ_PHY_LINK_ENABLED;
@@ -1746,7 +1750,8 @@ i40e_dev_start(struct rte_eth_dev *dev)
/* Apply link configure */
if (dev->data->dev_conf.link_speeds & ~(ETH_LINK_SPEED_100M |
ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
- ETH_LINK_SPEED_20G | ETH_LINK_SPEED_40G)) {
+ ETH_LINK_SPEED_20G | ETH_LINK_SPEED_25G |
+ ETH_LINK_SPEED_40G)) {
PMD_DRV_LOG(ERR, "Invalid link setting");
goto err_up;
}
@@ -1966,9 +1971,10 @@ static int
i40e_dev_set_link_down(struct rte_eth_dev *dev)
{
uint8_t speed = I40E_LINK_SPEED_UNKNOWN;
- uint8_t abilities = I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
+ uint8_t abilities = 0;
struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-
+ if (i40e_get_link_speed_by_devid(hw->device_id)!=I40E_LINK_SPEED_25GB)
+ abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
return i40e_phy_conf_link(hw, abilities, speed);
}
@@ -2026,6 +2032,9 @@ i40e_dev_link_update(struct rte_eth_dev *dev,
case I40E_LINK_SPEED_20GB:
link.link_speed = ETH_SPEED_NUM_20G;
break;
+ case I40E_LINK_SPEED_25GB:
+ link.link_speed = ETH_SPEED_NUM_25G;
+ break;
case I40E_LINK_SPEED_40GB:
link.link_speed = ETH_SPEED_NUM_40G;
break;
@@ -2630,6 +2639,9 @@ i40e_dev_info_get(struct rte_eth_dev *dev, struct
rte_eth_dev_info *dev_info)
if (link_speed == I40E_LINK_SPEED_40GB)
/* For XL710 */
dev_info->speed_capa = ETH_LINK_SPEED_40G;
+ if (link_speed == I40E_LINK_SPEED_25GB)
+ /* For XXL710 */
+ dev_info->speed_capa = ETH_LINK_SPEED_25G;
else
/* For X710 */
dev_info->speed_capa = ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G;
@@ -8077,7 +8089,8 @@ i40e_configure_registers(struct i40e_hw *hw)
for (i = 0; i < RTE_DIM(reg_table); i++) {
if (reg_table[i].addr == I40E_GL_SWR_PM_UP_THR) {
- if (link_speed == I40E_LINK_SPEED_40GB) /* For XL710 */
+ if (link_speed == I40E_LINK_SPEED_40GB ||
+ link_speed == I40E_LINK_SPEED_25GB) /* For XL710 */
reg_table[i].val =
I40E_GL_SWR_PM_UP_THR_SF_VALUE;
else /* For X710 */
--
2.7.4
