This patch moves computing of pre-counter block into the AESNI-GCM
driver so it can be moved from test files.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal at intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain at intel.com>
---
 drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c 
b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
index dc0b033..857d74f 100644
--- a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
+++ b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
@@ -230,11 +230,20 @@ process_gcm_crypto_op(struct aesni_gcm_qp *qp, struct 
rte_crypto_sym_op *op,
                                        op->cipher.data.offset);

        /* sanity checks */
-       if (op->cipher.iv.length != 16 && op->cipher.iv.length != 0) {
+       if (op->cipher.iv.length != 16 && op->cipher.iv.length != 12 &&
+                       op->cipher.iv.length != 0) {
                GCM_LOG_ERR("iv");
                return -1;
        }

+       /*
+        * GCM working in 12B IV mode => 16B pre-counter block we need
+        * to set BE LSB to 1, driver expects that 16B is allocated
+        */
+       if (op->cipher.iv.length == 12) {
+               op->cipher.iv.data[15] = 1;
+       }
+
        if (op->auth.aad.length != 12 && op->auth.aad.length != 8 &&
                        op->auth.aad.length != 0) {
                GCM_LOG_ERR("iv");
-- 
2.1.0

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