Hi Ferruh,

> -----Original Message-----
> From: Yigit, Ferruh
> Sent: Tuesday, September 20, 2016 1:07 AM
> To: Wang, Xiao W <xiao.w.wang at intel.com>; Lu, Wenzhuo
> <wenzhuo.lu at intel.com>
> Cc: dev at dpdk.org
> Subject: Re: [dpdk-dev] [PATCH 18/39] net/ixgbe/base: fix check on NACK
> 
> On 8/27/2016 4:48 PM, Xiao Wang wrote:
> > Previously we checked only msgbuf[0] for
> 
> "return buffer" instead of msgbuf[0] ?
> 

Looks better. Use it in v2.

> > (IXGBE_VF_SET_MACVLAN |  IXGBE_VT_MSGTYPE_NACK), but this would not
> > work if index != 0 and as a result NACK will not be detected.
> 
> "write buffer is not 0" instead of "index != 0"
> 

    msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
    msgbuf[0] |= IXGBE_VF_SET_MACVLAN;

"index != 0" has effect on the msgbuf[0], so we should emphasize on "index".
I will change it to "index is not 0" in v2.

> >
> 
> Function also starts using ixgbevf_write_msg_read_ack() instead of
> separate write and read, is it possible to fix NACK only in this patch,
> and do ixgbevf_write_msg_read_ack() switch in patch 27/39.
> If prefer to keep in this patch, please mention about this switch in
> comment log.
> 

Agree. Thanks.

> > Fixes: af75078fece3 ("first public release")
> >
> > Signed-off-by: Xiao Wang <xiao.w.wang at intel.com>
> > ---
> >  drivers/net/ixgbe/base/ixgbe_vf.c | 18 ++++++++----------
> >  1 file changed, 8 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/net/ixgbe/base/ixgbe_vf.c
> b/drivers/net/ixgbe/base/ixgbe_vf.c
> > index c0fedea..f60ff7d 100644
> > --- a/drivers/net/ixgbe/base/ixgbe_vf.c
> > +++ b/drivers/net/ixgbe/base/ixgbe_vf.c
> > @@ -529,8 +529,7 @@ s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8
> *mac_addr)
> >
> >  s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
> >  {
> > -   struct ixgbe_mbx_info *mbx = &hw->mbx;
> > -   u32 msgbuf[3];
> > +   u32 msgbuf[3], msgbuf_chk;
> >     u8 *msg_addr = (u8 *)(&msgbuf[1]);
> >     s32 ret_val;
> >
> > @@ -543,18 +542,17 @@ s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw,
> u32 index, u8 *addr)
> >      */
> >     msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
> >     msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
> > +   msgbuf_chk = msgbuf[0];
> >     if (addr)
> >             memcpy(msg_addr, addr, 6);
> > -   ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
> >
> > -   if (!ret_val)
> > -           ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
> > +   ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
> > +   if (!ret_val) {
> > +           msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
> >
> > -   msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
> > -
> > -   if (!ret_val)
> > -           if (msgbuf[0] == (IXGBE_VF_SET_MACVLAN |
> IXGBE_VT_MSGTYPE_NACK))
> > -                   ret_val = IXGBE_ERR_OUT_OF_MEM;
> > +           if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_NACK))
> > +                   return IXGBE_ERR_OUT_OF_MEM;
> 
> What about following instead of introducing msgbuf_chk:
> 
> if ((msgbuf[0] & IXGBE_VF_SET_MACVLAN) &&
>           (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK))
> 
> Please check patch 15/39

It's different from 15/39 where the write buffer is simple,
Here the write buffer msgbuf[0] is more complicated, if we don't
introduce msgbuf_chk, the code will looks bloated. 

> 
> > +   }
> >
> >     return ret_val;
> >  }
> >
> 
> 

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