This patch adds various hwrm API which allows the configuration
and allocation of resources for a PCI function depending on whether
it is a PF or a VF. These structures will be used in subsequent
patches.

Signed-off-by: Ajit Khaparde <ajit.khapa...@broadcom.com>
---
 drivers/net/bnxt/hsi_struct_def_dpdk.h | 1497 ++++++++++++++++++++++++++++++--
 1 file changed, 1417 insertions(+), 80 deletions(-)

diff --git a/drivers/net/bnxt/hsi_struct_def_dpdk.h 
b/drivers/net/bnxt/hsi_struct_def_dpdk.h
index f024837..a091a0b 100644
--- a/drivers/net/bnxt/hsi_struct_def_dpdk.h
+++ b/drivers/net/bnxt/hsi_struct_def_dpdk.h
@@ -85,20 +85,63 @@ struct ctx_hw_stats64 {
  * Request types
  */
 #define HWRM_VER_GET                   (UINT32_C(0x0))
+#define HWRM_FUNC_BUF_UNRGTR           (UINT32_C(0xe))
+#define HWRM_FUNC_VF_CFG               (UINT32_C(0xf))
+    /* Reserved for future use */
+#define RESERVED1                      (UINT32_C(0x10))
 #define HWRM_FUNC_RESET                        (UINT32_C(0x11))
+#define HWRM_FUNC_GETFID               (UINT32_C(0x12))
+#define HWRM_FUNC_VF_ALLOC             (UINT32_C(0x13))
+#define HWRM_FUNC_VF_FREE              (UINT32_C(0x14))
 #define HWRM_FUNC_QCAPS                        (UINT32_C(0x15))
 #define HWRM_FUNC_QCFG                 (UINT32_C(0x16))
+#define HWRM_FUNC_CFG                  (UINT32_C(0x17))
+#define HWRM_FUNC_QSTATS               (UINT32_C(0x18))
+#define HWRM_FUNC_CLR_STATS            (UINT32_C(0x19))
 #define HWRM_FUNC_DRV_UNRGTR           (UINT32_C(0x1a))
+#define HWRM_FUNC_VF_RESC_FREE         (UINT32_C(0x1b))
+#define HWRM_FUNC_VF_VNIC_IDS_QUERY    (UINT32_C(0x1c))
 #define HWRM_FUNC_DRV_RGTR             (UINT32_C(0x1d))
+#define HWRM_FUNC_DRV_QVER             (UINT32_C(0x1e))
+#define HWRM_FUNC_BUF_RGTR             (UINT32_C(0x1f))
 #define HWRM_PORT_PHY_CFG              (UINT32_C(0x20))
+#define HWRM_PORT_MAC_CFG              (UINT32_C(0x21))
+#define HWRM_PORT_QSTATS               (UINT32_C(0x23))
+#define HWRM_PORT_LPBK_QSTATS          (UINT32_C(0x24))
 #define HWRM_PORT_PHY_QCFG             (UINT32_C(0x27))
+#define HWRM_PORT_MAC_QCFG             (UINT32_C(0x28))
+#define HWRM_PORT_PHY_QCAPS            (UINT32_C(0x2a))
+#define HWRM_PORT_LED_CFG              (UINT32_C(0x2d))
+#define HWRM_PORT_LED_QCFG             (UINT32_C(0x2e))
+#define HWRM_PORT_LED_QCAPS            (UINT32_C(0x2f))
 #define HWRM_QUEUE_QPORTCFG            (UINT32_C(0x30))
+#define HWRM_QUEUE_QCFG                        (UINT32_C(0x31))
+#define HWRM_QUEUE_CFG                 (UINT32_C(0x32))
+    /* Reserved for future use */
+#define RESERVED2                      (UINT32_C(0x33))
+    /* Reserved for future use */
+#define RESERVED3                      (UINT32_C(0x34))
+#define HWRM_QUEUE_PFCENABLE_QCFG      (UINT32_C(0x35))
+#define HWRM_QUEUE_PFCENABLE_CFG       (UINT32_C(0x36))
+#define HWRM_QUEUE_PRI2COS_QCFG                (UINT32_C(0x37))
+#define HWRM_QUEUE_PRI2COS_CFG         (UINT32_C(0x38))
+#define HWRM_QUEUE_COS2BW_QCFG         (UINT32_C(0x39))
+#define HWRM_QUEUE_COS2BW_CFG          (UINT32_C(0x3a))
+#define HWRM_VNIC_ALLOC                        (UINT32_C(0x40))
 #define HWRM_VNIC_ALLOC                        (UINT32_C(0x40))
 #define HWRM_VNIC_FREE                 (UINT32_C(0x41))
 #define HWRM_VNIC_CFG                  (UINT32_C(0x42))
+#define HWRM_VNIC_QCFG                 (UINT32_C(0x43))
+#define HWRM_VNIC_TPA_CFG              (UINT32_C(0x44))
 #define HWRM_VNIC_RSS_CFG              (UINT32_C(0x46))
+#define HWRM_VNIC_RSS_QCFG             (UINT32_C(0x47))
+#define HWRM_VNIC_PLCMODES_CFG         (UINT32_C(0x48))
+#define HWRM_VNIC_PLCMODES_QCFG                (UINT32_C(0x49))
 #define HWRM_RING_ALLOC                        (UINT32_C(0x50))
 #define HWRM_RING_FREE                 (UINT32_C(0x51))
+#define HWRM_RING_CMPL_RING_QAGGINT_PARAMS     (UINT32_C(0x52))
+#define HWRM_RING_CMPL_RING_CFG_AGGINT_PARAM   (UINT32_C(0x53))
+#define HWRM_RING_RESET                        (UINT32_C(0x5e))
 #define HWRM_RING_GRP_ALLOC            (UINT32_C(0x60))
 #define HWRM_RING_GRP_FREE             (UINT32_C(0x61))
 #define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC (UINT32_C(0x70))
@@ -107,10 +150,46 @@ struct ctx_hw_stats64 {
 #define HWRM_CFA_L2_FILTER_FREE                (UINT32_C(0x91))
 #define HWRM_CFA_L2_FILTER_CFG         (UINT32_C(0x92))
 #define HWRM_CFA_L2_SET_RX_MASK                (UINT32_C(0x93))
+    /* Reserved for future use */
+#define RESERVED4                      (UINT32_C(0x94))
+#define HWRM_CFA_TUNNEL_FILTER_ALLOC   (UINT32_C(0x95))
+#define HWRM_CFA_TUNNEL_FILTER_FREE    (UINT32_C(0x96))
+#define HWRM_CFA_NTUPLE_FILTER_ALLOC   (UINT32_C(0x99))
+#define HWRM_CFA_NTUPLE_FILTER_FREE    (UINT32_C(0x9a))
+#define HWRM_CFA_NTUPLE_FILTER_CFG     (UINT32_C(0x9b))
+#define HWRM_TUNNEL_DST_PORT_QUERY     (UINT32_C(0xa0))
+#define HWRM_TUNNEL_DST_PORT_ALLOC     (UINT32_C(0xa1))
+#define HWRM_TUNNEL_DST_PORT_FREE      (UINT32_C(0xa2))
 #define HWRM_STAT_CTX_ALLOC            (UINT32_C(0xb0))
 #define HWRM_STAT_CTX_FREE             (UINT32_C(0xb1))
 #define HWRM_STAT_CTX_CLR_STATS                (UINT32_C(0xb3))
 #define HWRM_EXEC_FWD_RESP             (UINT32_C(0xd0))
+#define HWRM_REJECT_FWD_RESP           (UINT32_C(0xd1))
+#define HWRM_FWD_RESP                  (UINT32_C(0xd2))
+#define HWRM_FWD_ASYNC_EVENT_CMPL      (UINT32_C(0xd3))
+#define HWRM_TEMP_MONITOR_QUERY                (UINT32_C(0xe0))
+#define HWRM_WOL_FILTER_ALLOC          (UINT32_C(0xf0))
+#define HWRM_WOL_FILTER_FREE           (UINT32_C(0xf1))
+#define HWRM_WOL_FILTER_QCFG           (UINT32_C(0xf2))
+#define HWRM_WOL_REASON_QCFG           (UINT32_C(0xf3))
+#define HWRM_DBG_DUMP                  (UINT32_C(0xff14))
+#define HWRM_NVM_VALIDATE_OPTION       (UINT32_C(0xffef))
+#define HWRM_NVM_FLUSH                 (UINT32_C(0xfff0))
+#define HWRM_NVM_GET_VARIABLE          (UINT32_C(0xfff1))
+#define HWRM_NVM_SET_VARIABLE          (UINT32_C(0xfff2))
+#define HWRM_NVM_INSTALL_UPDATE                (UINT32_C(0xfff3))
+#define HWRM_NVM_MODIFY                        (UINT32_C(0xfff4))
+#define HWRM_NVM_VERIFY_UPDATE         (UINT32_C(0xfff5))
+#define HWRM_NVM_GET_DEV_INFO          (UINT32_C(0xfff6))
+#define HWRM_NVM_ERASE_DIR_ENTRY       (UINT32_C(0xfff7))
+#define HWRM_NVM_MOD_DIR_ENTRY         (UINT32_C(0xfff8))
+#define HWRM_NVM_FIND_DIR_ENTRY                (UINT32_C(0xfff9))
+#define HWRM_NVM_GET_DIR_ENTRIES       (UINT32_C(0xfffa))
+#define HWRM_NVM_GET_DIR_INFO          (UINT32_C(0xfffb))
+#define HWRM_NVM_RAW_DUMP              (UINT32_C(0xfffc))
+#define HWRM_NVM_READ                  (UINT32_C(0xfffd))
+#define HWRM_NVM_WRITE                 (UINT32_C(0xfffe))
+#define HWRM_NVM_RAW_WRITE_BLK         (UINT32_C(0xffff))
 
 /* Return Codes */
 #define HWRM_ERR_CODE_INVALID_PARAMS                      (UINT32_C(0x2))
@@ -2261,6 +2340,432 @@ struct hwrm_func_qcfg_output {
         */
 } __attribute__((packed));
 
+/* hwrm_func_cfg */
+/*
+ * Description: This command allows configuration of a PF by the corresponding
+ * PF driver. This command also allows configuration of a child VF by its 
parent
+ * PF driver. The input FID value is used to indicate what function is being
+ * configured. This allows a PF driver to configure the PF owned by itself or a
+ * virtual function that is a child of the PF. This command allows to reserve
+ * resources for a VF by its parent PF. To reverse the process, the command
+ * should be called with all enables flags cleared for resources. This will 
free
+ * allocated resources for the VF and return them to the resource pool. If this
+ * command is requested by a VF driver to configure or reserve resources, then
+ * the HWRM shall fail this command. If default MAC address and/or VLAN are
+ * provided in this command, then the HWRM shall set up appropriate MAC/VLAN
+ * filters for the function that is being configured. If source properties
+ * checks are enabled and default MAC address and/or IP address are provided in
+ * this command, then the HWRM shall set appropriate source property checks
+ * based on provided MAC and/or IP addresses. The parent PF driver should not
+ * set MTU/MRU for a VF using this command. This is to allow MTU/MRU setting by
+ * the VF driver. If the MTU or MRU for a VF is set by the PF driver, then the
+ * HWRM should ignore it. A function's MTU/MRU should be set prior to 
allocating
+ * RX VNICs or TX rings. A PF driver calls hwrm_func_cfg to allocate resources
+ * for itself or its children VFs. All function drivers shall call 
hwrm_func_cfg
+ * to reserve resources. A request to hwrm_func_cfg may not be fully granted;
+ * that is, a request for resources may be larger than what can be supported by
+ * the device and the HWRM will allocate the best set of resources available,
+ * but that may be less than requested. If all the amounts requested could not
+ * be fulfilled, the HWRM shall allocate what it could and return a status code
+ * of success. A function driver should call hwrm_func_qcfg immediately after
+ * hwrm_func_cfg to determine what resources were assigned to the configured
+ * function. A call by a PF driver to hwrm_func_cfg to allocate resources for
+ * itself shall only allocate resources for the PF driver to use, not for its
+ * children VFs. Likewise, a call to hwrm_func_qcfg shall return the resources
+ * available for the PF driver to use, not what is available to its children
+ * VFs.
+ */
+/* Input       (88 bytes) */
+struct hwrm_func_cfg_input {
+       uint16_t req_type;
+       /*
+        * This value indicates what type of request this is. The format
+        * for the rest of the command is determined by this field.
+        */
+       uint16_t cmpl_ring;
+       /*
+        * This value indicates the what completion ring the request
+        * will be optionally completed on. If the value is -1, then no
+        * CR completion will be generated. Any other value must be a
+        * valid CR ring_id value for this function.
+        */
+       uint16_t seq_id;
+       /* This value indicates the command sequence number. */
+       uint16_t target_id;
+       /*
+        * Target ID of this command. 0x0 - 0xFFF8 - Used for function
+        * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
+        * - HWRM
+        */
+       uint64_t resp_addr;
+       /*
+        * This is the host address where the response will be written
+        * when the request is complete. This area must be 16B aligned
+        * and must be cleared to zero before the request is made.
+        */
+       uint16_t fid;
+       /*
+        * Function ID of the function that is being configured. If set
+        * to 0xFF...   (All Fs), then the the configuration is for the
+        * requesting function.
+        */
+       uint8_t unused_0;
+       uint8_t unused_1;
+       uint32_t flags;
+       /*
+        * When this bit is '1', the function is disabled with source
+        * MAC address check. This is an anti-spoofing check. If this
+        * flag is set, then the function shall be configured to
+        * disallow transmission of frames with the source MAC address
+        * that is configured for this function.
+        */
+       #define HWRM_FUNC_CFG_INPUT_FLAGS_SRC_MAC_ADDR_CHECK_DISABLE     \
+               UINT32_C(0x1)
+       /*
+        * When this bit is '1', the function is enabled with source MAC
+        * address check. This is an anti-spoofing check. If this flag
+        * is set, then the function shall be configured to allow
+        * transmission of frames with the source MAC address that is
+        * configured for this function.
+        */
+       #define HWRM_FUNC_CFG_INPUT_FLAGS_SRC_MAC_ADDR_CHECK_ENABLE     \
+               UINT32_C(0x2)
+       /* reserved */
+       #define HWRM_FUNC_CFG_INPUT_FLAGS_RSVD_MASK     UINT32_C(0x1fc)
+       #define HWRM_FUNC_CFG_INPUT_FLAGS_RSVD_SFT      2
+       /*
+        * Standard TX Ring mode is used for the allocation of TX ring
+        * and underlying scheduling resources that allow bandwidth
+        * reservation and limit settings on the queried function. If
+        * set to 1, then standard TX ring mode is requested to be
+        * enabled on the function being configured.
+        */
+       #define HWRM_FUNC_CFG_INPUT_FLAGS_STD_TX_RING_MODE_ENABLE       \
+               UINT32_C(0x200)
+       /*
+        * Standard TX Ring mode is used for the allocation of TX ring
+        * and underlying scheduling resources that allow bandwidth
+        * reservation and limit settings on the queried function. If
+        * set to 1, then the standard TX ring mode is requested to be
+        * disabled on the function being configured. In this extended
+        * TX ring resource mode, the minimum and maximum bandwidth
+        * settings are not supported to allow the allocation of TX
+        * rings to span multiple scheduler nodes.
+        */
+       #define HWRM_FUNC_CFG_INPUT_FLAGS_STD_TX_RING_MODE_DISABLE      \
+               UINT32_C(0x400)
+       uint32_t enables;
+       /* This bit must be '1' for the mtu field to be configured. */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_MTU UINT32_C(0x1)
+       /* This bit must be '1' for the mru field to be configured. */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_MRU UINT32_C(0x2)
+       /*
+        * This bit must be '1' for the num_rsscos_ctxs field to be
+        * configured.
+        */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_RSSCOS_CTXS     UINT32_C(0x4)
+       /*
+        * This bit must be '1' for the num_cmpl_rings field to be
+        * configured.
+        */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_CMPL_RINGS      UINT32_C(0x8)
+       /* This bit must be '1' for the num_tx_rings field to be configured. */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_TX_RINGS        UINT32_C(0x10)
+       /* This bit must be '1' for the num_rx_rings field to be configured. */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_RX_RINGS        UINT32_C(0x20)
+       /* This bit must be '1' for the num_l2_ctxs field to be configured. */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_L2_CTXS UINT32_C(0x40)
+       /* This bit must be '1' for the num_vnics field to be configured. */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_VNICS   UINT32_C(0x80)
+       /*
+        * This bit must be '1' for the num_stat_ctxs field to be
+        * configured.
+        */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_STAT_CTXS       UINT32_C(0x100)
+       /*
+        * This bit must be '1' for the dflt_mac_addr field to be
+        * configured.
+        */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_MAC_ADDR       UINT32_C(0x200)
+       /* This bit must be '1' for the dflt_vlan field to be configured. */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_VLAN   UINT32_C(0x400)
+       /* This bit must be '1' for the dflt_ip_addr field to be configured. */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_IP_ADDR        UINT32_C(0x800)
+       /* This bit must be '1' for the min_bw field to be configured. */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_MIN_BW      UINT32_C(0x1000)
+       /* This bit must be '1' for the max_bw field to be configured. */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_MAX_BW      UINT32_C(0x2000)
+       /*
+        * This bit must be '1' for the async_event_cr field to be
+        * configured.
+        */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_ASYNC_EVENT_CR      UINT32_C(0x4000)
+       /*
+        * This bit must be '1' for the vlan_antispoof_mode field to be
+        * configured.
+        */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_VLAN_ANTISPOOF_MODE UINT32_C(0x8000)
+       /*
+        * This bit must be '1' for the allowed_vlan_pris field to be
+        * configured.
+        */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_ALLOWED_VLAN_PRIS UINT32_C(0x10000)
+       /* This bit must be '1' for the evb_mode field to be configured. */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_EVB_MODE    UINT32_C(0x20000)
+       /*
+        * This bit must be '1' for the num_mcast_filters field to be
+        * configured.
+        */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_MCAST_FILTERS UINT32_C(0x40000)
+       /*
+        * This bit must be '1' for the num_hw_ring_grps field to be
+        * configured.
+        */
+       #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_HW_RING_GRPS UINT32_C(0x80000)
+       uint16_t mtu;
+       /*
+        * The maximum transmission unit of the function. The HWRM
+        * should make sure that the mtu of the function does not exceed
+        * the mtu of the physical port that this function is associated
+        * with. In addition to configuring mtu per function, it is
+        * possible to configure mtu per transmit ring. By default, the
+        * mtu of each transmit ring associated with a function is equal
+        * to the mtu of the function. The HWRM should make sure that
+        * the mtu of each transmit ring that is assigned to a function
+        * has a valid mtu.
+        */
+       uint16_t mru;
+       /*
+        * The maximum receive unit of the function. The HWRM should
+        * make sure that the mru of the function does not exceed the
+        * mru of the physical port that this function is associated
+        * with. In addition to configuring mru per function, it is
+        * possible to configure mru per vnic. By default, the mru of
+        * each vnic associated with a function is equal to the mru of
+        * the function. The HWRM should make sure that the mru of each
+        * vnic that is assigned to a function has a valid mru.
+        */
+       uint16_t num_rsscos_ctxs;
+       /* The number of RSS/COS contexts requested for the function. */
+       uint16_t num_cmpl_rings;
+       /*
+        * The number of completion rings requested for the function.
+        * This does not include the rings allocated to any children
+        * functions if any.
+        */
+       uint16_t num_tx_rings;
+       /*
+        * The number of transmit rings requested for the function. This
+        * does not include the rings allocated to any children
+        * functions if any.
+        */
+       uint16_t num_rx_rings;
+       /*
+        * The number of receive rings requested for the function. This
+        * does not include the rings allocated to any children
+        * functions if any.
+        */
+       uint16_t num_l2_ctxs;
+       /* The requested number of L2 contexts for the function. */
+       uint16_t num_vnics;
+       /* The requested number of vnics for the function. */
+       uint16_t num_stat_ctxs;
+       /* The requested number of statistic contexts for the function. */
+       uint16_t num_hw_ring_grps;
+       /*
+        * The number of HW ring groups that should be reserved for this
+        * function.
+        */
+       uint8_t dflt_mac_addr[6];
+       /* The default MAC address for the function being configured. */
+       uint16_t dflt_vlan;
+       /*
+        * The default VLAN for the function being configured. This
+        * field's format is same as 802.1Q Tag's Tag Control
+        * Information  (TCI) format that includes both Priority Code
+        * Point        (PCP) and VLAN Identifier       (VID).
+        */
+       uint32_t dflt_ip_addr[4];
+       /*
+        * The default IP address for the function being configured.
+        * This address is only used in enabling source property check.
+        */
+       uint32_t min_bw;
+       /*
+        * Minimum BW allocated for this function. The HWRM will
+        * translate this value into byte counter and time interval used
+        * for the scheduler inside the device.
+        */
+       /* The bandwidth value. */
+       #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_MASK        \
+               UINT32_C(0xfffffff)
+       #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_SFT 0
+       /* The granularity of the value (bits or bytes). */
+       #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE        UINT32_C(0x10000000)
+       /* Value is in bits. */
+       #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE_BITS   (UINT32_C(0x0) << 28)
+       /* Value is in bytes. */
+       #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE_BYTES  (UINT32_C(0x1) << 28)
+       #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE_LAST \
+               FUNC_CFG_INPUT_MIN_BW_SCALE_BYTES
+       /* bw_value_unit is 3 b */
+       #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_MASK    \
+               UINT32_C(0xe0000000)
+       #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_SFT    29
+       /* Value is in Mb or MB (base 10). */
+       #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_MEGA   \
+               (UINT32_C(0x0) << 29)
+       /* Value is in Kb or KB (base 10). */
+       #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_KILO   \
+               (UINT32_C(0x2) << 29)
+       /* Value is in bits or bytes. */
+       #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_BASE   \
+               (UINT32_C(0x4) << 29)
+       /* Value is in Gb or GB (base 10). */
+       #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_GIGA   \
+               (UINT32_C(0x6) << 29)
+       /* Value is in 1/100th of a percentage of total bandwidth. */
+       #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_PERCENT1_100 \
+               (UINT32_C(0x1) << 29)
+       /* Invalid unit */
+       #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_INVALID        \
+               (UINT32_C(0x7) << 29)
+       #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_LAST \
+               FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_INVALID
+       uint32_t max_bw;
+       /*
+        * Maximum BW allocated for this function. The HWRM will
+        * translate this value into byte counter and time interval used
+        * for the scheduler inside the device.
+        */
+       /* The bandwidth value. */
+       #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_MASK        \
+               UINT32_C(0xfffffff)
+       #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_SFT 0
+       /* The granularity of the value (bits or bytes). */
+       #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE        UINT32_C(0x10000000)
+       /* Value is in bits. */
+       #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE_BITS   (UINT32_C(0x0) << 28)
+       /* Value is in bytes. */
+       #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE_BYTES  (UINT32_C(0x1) << 28)
+       #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE_LAST \
+               FUNC_CFG_INPUT_MAX_BW_SCALE_BYTES
+       /* bw_value_unit is 3 b */
+       #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_MASK    \
+               UINT32_C(0xe0000000)
+       #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_SFT    29
+       /* Value is in Mb or MB (base 10). */
+       #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_MEGA   \
+               (UINT32_C(0x0) << 29)
+       /* Value is in Kb or KB (base 10). */
+       #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_KILO   \
+               (UINT32_C(0x2) << 29)
+       /* Value is in bits or bytes. */
+       #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_BASE   \
+               (UINT32_C(0x4) << 29)
+       /* Value is in Gb or GB (base 10). */
+       #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_GIGA   \
+               (UINT32_C(0x6) << 29)
+       /* Value is in 1/100th of a percentage of total bandwidth. */
+       #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
+               (UINT32_C(0x1) << 29)
+       /* Invalid unit */
+       #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID        \
+               (UINT32_C(0x7) << 29)
+       #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_LAST \
+               FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID
+       uint16_t async_event_cr;
+       /*
+        * ID of the target completion ring for receiving asynchronous
+        * event completions. If this field is not valid, then the HWRM
+        * shall use the default completion ring of the function that is
+        * being configured as the target completion ring for providing
+        * any asynchronous event completions for that function. If this
+        * field is valid, then the HWRM shall use the completion ring
+        * identified by this ID as the target completion ring for
+        * providing any asynchronous event completions for the function
+        * that is being configured.
+        */
+       uint8_t vlan_antispoof_mode;
+       /* VLAN Anti-spoofing mode. */
+       /* No VLAN anti-spoofing checks are enabled */
+       #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_NOCHECK UINT32_C(0x0)
+       /* Validate VLAN against the configured VLAN(s) */
+       #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_VALIDATE_VLAN \
+               UINT32_C(0x1)
+       /* Insert VLAN if it does not exist, otherwise discard */
+       #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_INSERT_IF_VLANDNE \
+               UINT32_C(0x2)
+       /*
+        * Insert VLAN if it does not exist, override
+        * VLAN if it exists
+        */
+       #define \
+       HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_INSERT_OR_OVERRIDE_VLAN \
+               UINT32_C(0x3)
+       uint8_t allowed_vlan_pris;
+       /*
+        * This bit field defines VLAN PRIs that are allowed on this
+        * function. If nth bit is set, then VLAN PRI n is allowed on
+        * this function.
+        */
+       uint8_t evb_mode;
+       /*
+        * The HWRM shall allow a PF driver to change EVB mode for the
+        * partition it belongs to. The HWRM shall not allow a VF driver
+        * to change the EVB mode. The HWRM shall take into account the
+        * switching of EVB mode from one to another and reconfigure
+        * hardware resources as appropriately. The switching from VEB
+        * to VEPA mode requires the disabling of the loopback traffic.
+        * Additionally, source knock outs are handled differently in
+        * VEB and VEPA modes.
+        */
+       /* No Edge Virtual Bridging     (EVB) */
+       #define HWRM_FUNC_CFG_INPUT_EVB_MODE_NO_EVB     UINT32_C(0x0)
+       /* Virtual Ethernet Bridge      (VEB) */
+       #define HWRM_FUNC_CFG_INPUT_EVB_MODE_VEB        UINT32_C(0x1)
+       /* Virtual Ethernet Port Aggregator     (VEPA) */
+       #define HWRM_FUNC_CFG_INPUT_EVB_MODE_VEPA       UINT32_C(0x2)
+       uint8_t unused_2;
+       uint16_t num_mcast_filters;
+       /*
+        * The number of multicast filters that should be reserved for
+        * this function on the RX side.
+        */
+} __attribute__((packed));
+
+/* Output      (16 bytes) */
+struct hwrm_func_cfg_output {
+       uint16_t error_code;
+       /*
+        * Pass/Fail or error type Note: receiver to verify the in
+        * parameters, and fail the call with an error when appropriate
+        */
+       uint16_t req_type;
+       /* This field returns the type of original request. */
+       uint16_t seq_id;
+       /* This field provides original sequence number of the command. */
+       uint16_t resp_len;
+       /*
+        * This field is the length of the response in bytes. The last
+        * byte of the response is a valid flag that will read as '1'
+        * when the command has been completely written to memory.
+        */
+       uint32_t unused_0;
+       uint8_t unused_1;
+       uint8_t unused_2;
+       uint8_t unused_3;
+       uint8_t valid;
+       /*
+        * This field is used in Output records to indicate that the
+        * output is completely written to RAM. This field should be
+        * read as '1' to indicate that the output has been completely
+        * written. When writing a command completion or response to an
+        * internal processor, the order of writes has to be such that
+        * this field is written last.
+        */
+} __attribute__((packed));
+
 /* hwrm_func_drv_rgtr */
 /*
  * Description: This command is used by the function driver to register its
@@ -2491,17 +2996,16 @@ struct hwrm_func_drv_unrgtr_output {
         */
 } __attribute__((packed));
 
-/* hwrm_port_phy_cfg */
+/* hwrm_func_buf_rgtr */
 /*
- * Description: This command configures the PHY device for the port. It allows
- * setting of the most generic settings for the PHY. The HWRM shall complete
- * this command as soon as PHY settings are configured. They may not be applied
- * when the command response is provided. A VF driver shall not be allowed to
- * configure PHY using this command. In a network partition mode, a PF driver
- * shall not be allowed to configure PHY using this command.
+ * Description: This command is used by the PF driver to register buffers used
+ * in the PF-VF communication with the HWRM. The PF driver uses this command to
+ * register buffers for each PF-VF channel. A parent PF may issue this command
+ * per child VF. If VF ID is not valid, then this command is used to register
+ * buffers for all children VFs of the PF.
  */
-/* Input (56 bytes) */
-struct hwrm_port_phy_cfg_input {
+/* Input       (128 bytes) */
+struct hwrm_func_buf_rgtr_input {
        uint16_t req_type;
        /*
         * This value indicates what type of request this is. The format
@@ -2528,64 +3032,378 @@ struct hwrm_port_phy_cfg_input {
         * when the request is complete. This area must be 16B aligned
         * and must be cleared to zero before the request is made.
         */
-       uint32_t flags;
+       uint32_t enables;
+       /* This bit must be '1' for the vf_id field to be configured. */
+       #define HWRM_FUNC_BUF_RGTR_INPUT_ENABLES_VF_ID  UINT32_C(0x1)
+       /* This bit must be '1' for the err_buf_addr field to be configured. */
+       #define HWRM_FUNC_BUF_RGTR_INPUT_ENABLES_ERR_BUF_ADDR   UINT32_C(0x2)
+       uint16_t vf_id;
        /*
-        * When this bit is set to '1', the PHY for the port shall be
-        * reset. # If this bit is set to 1, then the HWRM shall reset
-        * the PHY after applying PHY configuration changes specified in
-        * this command. # In order to guarantee that PHY configuration
-        * changes specified in this command take effect, the HWRM
-        * client should set this flag to 1. # If this bit is not set to
-        * 1, then the HWRM may reset the PHY depending on the current
-        * PHY configuration and settings specified in this command.
-        */
-       #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
+        * This value is used to identify a Virtual Function    (VF). The
+        * scope of VF ID is local within a PF.
+        */
+       uint16_t req_buf_num_pages;
+       /*
+        * This field represents the number of pages used for request
+        * buffer(s).
+        */
+       uint16_t req_buf_page_size;
+       /* This field represents the page size used for request buffer(s). */
+       /* 16 bytes */
+       #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_16B UINT32_C(0x4)
+       /* 4 Kbytes */
+       #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_4K UINT32_C(0xc)
+       /* 8 Kbytes */
+       #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_8K UINT32_C(0xd)
+       /* 64 Kbytes */
+       #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_64K UINT32_C(0x10)
+       /* 2 Mbytes */
+       #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_2M UINT32_C(0x15)
+       /* 4 Mbytes */
+       #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_4M UINT32_C(0x16)
+       /* 1 Gbytes */
+       #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_1G UINT32_C(0x1e)
+       uint16_t req_buf_len;
+       /* The length of the request buffer per VF in bytes. */
+       uint16_t resp_buf_len;
+       /* The length of the response buffer in bytes. */
+       uint8_t unused_0;
+       uint8_t unused_1;
+       uint64_t req_buf_page_addr[10];
+       /* This field represents the page address of req buffer. */
+       uint64_t error_buf_addr;
        /*
-        * When this bit is set to '1', the link shall be forced to be
-        * taken down. # When this bit is set to '1", all other command
-        * input settings related to the link speed shall be ignored.
-        * Once the link state is forced down, it can be explicitly
-        * cleared from that state by setting this flag to '0'. # If
-        * this flag is set to '0', then the link shall be cleared from
-        * forced down state if the link is in forced down state. There
-        * may be conditions (e.g. out-of-band or sideband configuration
-        * changes for the link) outside the scope of the HWRM
-        * implementation that may clear forced down link state.
+        * This field is used to receive the error reporting from the
+        * chipset. Only applicable for PFs.
         */
-       #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DOWN   UINT32_C(0x2)
+       uint64_t resp_buf_addr;
+       /* This field is used to receive the response forwarded by the HWRM. */
+} __attribute__((packed));
+
+/* Output      (16 bytes) */
+struct hwrm_func_buf_rgtr_output {
+       uint16_t error_code;
        /*
-        * When this bit is set to '1', the link shall be forced to the
-        * force_link_speed value. When this bit is set to '1', the HWRM
-        * client should not enable any of the auto negotiation related
-        * fields represented by auto_XXX fields in this command. When
-        * this bit is set to '1' and the HWRM client has enabled a
-        * auto_XXX field in this command, then the HWRM shall ignore
-        * the enabled auto_XXX field. When this bit is set to zero, the
-        * link shall be allowed to autoneg.
+        * Pass/Fail or error type Note: receiver to verify the in
+        * parameters, and fail the call with an error when appropriate
         */
-       #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE     UINT32_C(0x4)
+       uint16_t req_type;
+       /* This field returns the type of original request. */
+       uint16_t seq_id;
+       /* This field provides original sequence number of the command. */
+       uint16_t resp_len;
        /*
-        * When this bit is set to '1', the auto-negotiation process
-        * shall be restarted on the link.
+        * This field is the length of the response in bytes. The last
+        * byte of the response is a valid flag that will read as '1'
+        * when the command has been completely written to memory.
         */
-       #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG   UINT32_C(0x8)
+       uint32_t unused_0;
+       uint8_t unused_1;
+       uint8_t unused_2;
+       uint8_t unused_3;
+       uint8_t valid;
        /*
-        * When this bit is set to '1', Energy Efficient Ethernet (EEE)
-        * is requested to be enabled on this link. If EEE is not
-        * supported on this port, then this flag shall be ignored by
-        * the HWRM.
+        * This field is used in Output records to indicate that the
+        * output is completely written to RAM. This field should be
+        * read as '1' to indicate that the output has been completely
+        * written. When writing a command completion or response to an
+        * internal processor, the order of writes has to be such that
+        * this field is written last.
         */
-       #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE        UINT32_C(0x10)
+} __attribute__((packed));
+
+/* hwrm_func_buf_unrgtr */
+/*
+ * Description: This command is used by the PF driver to unregister buffers 
used
+ * in the PF-VF communication with the HWRM. The PF driver uses this command to
+ * unregister buffers for PF-VF communication. A parent PF may issue this
+ * command to unregister buffers for communication between the PF and a 
specific
+ * VF. If the VF ID is not valid, then this command is used to unregister
+ * buffers used for communications with all children VFs of the PF.
+ */
+/* Input       (24 bytes) */
+struct hwrm_func_buf_unrgtr_input {
+       uint16_t req_type;
        /*
-        * When this bit is set to '1', Energy Efficient Ethernet (EEE)
-        * is requested to be disabled on this link. If EEE is not
-        * supported on this port, then this flag shall be ignored by
-        * the HWRM.
+        * This value indicates what type of request this is. The format
+        * for the rest of the command is determined by this field.
         */
-       #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE       UINT32_C(0x20)
+       uint16_t cmpl_ring;
        /*
-        * When this bit is set to '1' and EEE is enabled on this link,
-        * then TX LPI is requested to be enabled on the link. If EEE is
+        * This value indicates the what completion ring the request
+        * will be optionally completed on. If the value is -1, then no
+        * CR completion will be generated. Any other value must be a
+        * valid CR ring_id value for this function.
+        */
+       uint16_t seq_id;
+       /* This value indicates the command sequence number. */
+       uint16_t target_id;
+       /*
+        * Target ID of this command. 0x0 - 0xFFF8 - Used for function
+        * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
+        * - HWRM
+        */
+       uint64_t resp_addr;
+       /*
+        * This is the host address where the response will be written
+        * when the request is complete. This area must be 16B aligned
+        * and must be cleared to zero before the request is made.
+        */
+       uint32_t enables;
+       /* This bit must be '1' for the vf_id field to be configured. */
+       #define HWRM_FUNC_BUF_UNRGTR_INPUT_ENABLES_VF_ID        UINT32_C(0x1)
+       uint16_t vf_id;
+       /*
+        * This value is used to identify a Virtual Function    (VF). The
+        * scope of VF ID is local within a PF.
+        */
+       uint16_t unused_0;
+} __attribute__((packed));
+
+/* Output      (16 bytes) */
+struct hwrm_func_buf_unrgtr_output {
+       uint16_t error_code;
+       /*
+        * Pass/Fail or error type Note: receiver to verify the in
+        * parameters, and fail the call with an error when appropriate
+        */
+       uint16_t req_type;
+       /* This field returns the type of original request. */
+       uint16_t seq_id;
+       /* This field provides original sequence number of the command. */
+       uint16_t resp_len;
+       /*
+        * This field is the length of the response in bytes. The last
+        * byte of the response is a valid flag that will read as '1'
+        * when the command has been completely written to memory.
+        */
+       uint32_t unused_0;
+       uint8_t unused_1;
+       uint8_t unused_2;
+       uint8_t unused_3;
+       uint8_t valid;
+       /*
+        * This field is used in Output records to indicate that the
+        * output is completely written to RAM. This field should be
+        * read as '1' to indicate that the output has been completely
+        * written. When writing a command completion or response to an
+        * internal processor, the order of writes has to be such that
+        * this field is written last.
+        */
+} __attribute__((packed));
+
+/* hwrm_func_vf_cfg */
+/*
+ * Description: This command allows configuration of a VF by its driver. If 
this
+ * function is called by a PF driver, then the HWRM shall fail this command. If
+ * guest VLAN and/or MAC address are provided in this command, then the HWRM
+ * shall set up appropriate MAC/VLAN filters for the VF that is being
+ * configured. A VF driver should set VF MTU/MRU using this command prior to
+ * allocating RX VNICs or TX rings for the corresponding VF.
+ */
+/* Input (32 bytes) */
+
+struct hwrm_func_vf_cfg_input {
+       uint16_t req_type;
+       /*
+        * This value indicates what type of request this is. The format for the
+        * rest of the command is determined by this field.
+        */
+       uint16_t cmpl_ring;
+       /*
+        * This value indicates the what completion ring the request will be
+        * optionally completed on. If the value is -1, then no CR completion
+        * will be generated. Any other value must be a valid CR ring_id value
+        * for this function.
+        */
+       uint16_t seq_id;
+       /* This value indicates the command sequence number. */
+       uint16_t target_id;
+       /*
+        * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
+        * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
+        */
+       uint64_t resp_addr;
+       /*
+        * This is the host address where the response will be written when the
+        * request is complete. This area must be 16B aligned and must be
+        * cleared to zero before the request is made.
+        */
+       uint32_t enables;
+       /* This bit must be '1' for the mtu field to be configured. */
+       #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_MTU                 UINT32_C(0x1)
+       /* This bit must be '1' for the guest_vlan field to be configured. */
+       #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_GUEST_VLAN          UINT32_C(0x2)
+       /*
+        * This bit must be '1' for the async_event_cr field to be configured.
+        */
+       #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_ASYNC_EVENT_CR      UINT32_C(0x4)
+       /* This bit must be '1' for the dflt_mac_addr field to be configured. */
+       #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_DFLT_MAC_ADDR       UINT32_C(0x8)
+       uint16_t mtu;
+       /*
+        * The maximum transmission unit requested on the function. The HWRM
+        * should make sure that the mtu of the function does not exceed the mtu
+        * of the physical port that this function is associated with. In
+        * addition to requesting mtu per function, it is possible to configure
+        * mtu per transmit ring. By default, the mtu of each transmit ring
+        * associated with a function is equal to the mtu of the function. The
+        * HWRM should make sure that the mtu of each transmit ring that is
+        * assigned to a function has a valid mtu.
+        */
+       uint16_t guest_vlan;
+       /*
+        * The guest VLAN for the function being configured. This field's format
+        * is same as 802.1Q Tag's Tag Control Information (TCI) format that
+        * includes both Priority Code Point (PCP) and VLAN Identifier (VID).
+        */
+       uint16_t async_event_cr;
+       /*
+        * ID of the target completion ring for receiving asynchronous event
+        * completions. If this field is not valid, then the HWRM shall use the
+        * default completion ring of the function that is being configured as
+        * the target completion ring for providing any asynchronous event
+        * completions for that function. If this field is valid, then the HWRM
+        * shall use the completion ring identified by this ID as the target
+        * completion ring for providing any asynchronous event completions for
+        * the function that is being configured.
+        */
+       uint8_t dflt_mac_addr[6];
+       /*
+        * This value is the current MAC address requested by the VF driver to
+        * be configured on this VF. A value of 00-00-00-00-00-00 indicates no
+        * MAC address configuration is requested by the VF driver. The parent
+        * PF driver may reject or overwrite this MAC address.
+        */
+} __attribute__((packed));
+
+/* Output (16 bytes) */
+
+struct hwrm_func_vf_cfg_output {
+       uint16_t error_code;
+       /*
+        * Pass/Fail or error type Note: receiver to verify the in parameters,
+        * and fail the call with an error when appropriate
+        */
+       uint16_t req_type;
+       /* This field returns the type of original request. */
+       uint16_t seq_id;
+       /* This field provides original sequence number of the command. */
+       uint16_t resp_len;
+       /*
+        * This field is the length of the response in bytes. The last byte of
+        * the response is a valid flag that will read as '1' when the command
+        * has been completely written to memory.
+        */
+       uint32_t unused_0;
+       uint8_t unused_1;
+       uint8_t unused_2;
+       uint8_t unused_3;
+       uint8_t valid;
+       /*
+        * This field is used in Output records to indicate that the output is
+        * completely written to RAM. This field should be read as '1' to
+        * indicate that the output has been completely written. When writing a
+        * command completion or response to an internal processor, the order of
+        * writes has to be such that this field is written last.
+        */
+} __attribute__((packed));
+
+/* hwrm_port_phy_cfg */
+/*
+ * Description: This command configures the PHY device for the port. It allows
+ * setting of the most generic settings for the PHY. The HWRM shall complete
+ * this command as soon as PHY settings are configured. They may not be applied
+ * when the command response is provided. A VF driver shall not be allowed to
+ * configure PHY using this command. In a network partition mode, a PF driver
+ * shall not be allowed to configure PHY using this command.
+ */
+/* Input (56 bytes) */
+struct hwrm_port_phy_cfg_input {
+       uint16_t req_type;
+       /*
+        * This value indicates what type of request this is. The format
+        * for the rest of the command is determined by this field.
+        */
+       uint16_t cmpl_ring;
+       /*
+        * This value indicates the what completion ring the request
+        * will be optionally completed on. If the value is -1, then no
+        * CR completion will be generated. Any other value must be a
+        * valid CR ring_id value for this function.
+        */
+       uint16_t seq_id;
+       /* This value indicates the command sequence number. */
+       uint16_t target_id;
+       /*
+        * Target ID of this command. 0x0 - 0xFFF8 - Used for function
+        * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
+        * - HWRM
+        */
+       uint64_t resp_addr;
+       /*
+        * This is the host address where the response will be written
+        * when the request is complete. This area must be 16B aligned
+        * and must be cleared to zero before the request is made.
+        */
+       uint32_t flags;
+       /*
+        * When this bit is set to '1', the PHY for the port shall be
+        * reset. # If this bit is set to 1, then the HWRM shall reset
+        * the PHY after applying PHY configuration changes specified in
+        * this command. # In order to guarantee that PHY configuration
+        * changes specified in this command take effect, the HWRM
+        * client should set this flag to 1. # If this bit is not set to
+        * 1, then the HWRM may reset the PHY depending on the current
+        * PHY configuration and settings specified in this command.
+        */
+       #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
+       /*
+        * When this bit is set to '1', the link shall be forced to be
+        * taken down. # When this bit is set to '1", all other command
+        * input settings related to the link speed shall be ignored.
+        * Once the link state is forced down, it can be explicitly
+        * cleared from that state by setting this flag to '0'. # If
+        * this flag is set to '0', then the link shall be cleared from
+        * forced down state if the link is in forced down state. There
+        * may be conditions (e.g. out-of-band or sideband configuration
+        * changes for the link) outside the scope of the HWRM
+        * implementation that may clear forced down link state.
+        */
+       #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DOWN   UINT32_C(0x2)
+       /*
+        * When this bit is set to '1', the link shall be forced to the
+        * force_link_speed value. When this bit is set to '1', the HWRM
+        * client should not enable any of the auto negotiation related
+        * fields represented by auto_XXX fields in this command. When
+        * this bit is set to '1' and the HWRM client has enabled a
+        * auto_XXX field in this command, then the HWRM shall ignore
+        * the enabled auto_XXX field. When this bit is set to zero, the
+        * link shall be allowed to autoneg.
+        */
+       #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE     UINT32_C(0x4)
+       /*
+        * When this bit is set to '1', the auto-negotiation process
+        * shall be restarted on the link.
+        */
+       #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG   UINT32_C(0x8)
+       /*
+        * When this bit is set to '1', Energy Efficient Ethernet (EEE)
+        * is requested to be enabled on this link. If EEE is not
+        * supported on this port, then this flag shall be ignored by
+        * the HWRM.
+        */
+       #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE        UINT32_C(0x10)
+       /*
+        * When this bit is set to '1', Energy Efficient Ethernet (EEE)
+        * is requested to be disabled on this link. If EEE is not
+        * supported on this port, then this flag shall be ignored by
+        * the HWRM.
+        */
+       #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE       UINT32_C(0x20)
+       /*
+        * When this bit is set to '1' and EEE is enabled on this link,
+        * then TX LPI is requested to be enabled on the link. If EEE is
         * not supported on this port, then this flag shall be ignored
         * by the HWRM. If EEE is disabled on this port, then this flag
         * shall be ignored by the HWRM.
@@ -4366,10 +5184,14 @@ struct hwrm_vnic_cfg_output {
         */
 } __attribute__((packed));
 
-/* hwrm_vnic_rss_cfg */
-/* Description: This function is used to enable RSS configuration. */
-/* Input (48 bytes) */
-struct hwrm_vnic_rss_cfg_input {
+/* hwrm_vnic_qcfg */
+/*
+ * Description: Query the RX VNIC structure. This function can be used by a PF
+ * driver to query its own VNIC resource or VNIC resource of its child VF. This
+ * function can also be used by a VF driver to query its own VNIC resource.
+ */
+/* Input       (32 bytes) */
+struct hwrm_vnic_qcfg_input {
        uint16_t req_type;
        /*
         * This value indicates what type of request this is. The format
@@ -4396,36 +5218,176 @@ struct hwrm_vnic_rss_cfg_input {
         * when the request is complete. This area must be 16B aligned
         * and must be cleared to zero before the request is made.
         */
-       uint32_t hash_type;
+       uint32_t enables;
+       /* This bit must be '1' for the vf_id_valid field to be configured. */
+       #define HWRM_VNIC_QCFG_INPUT_ENABLES_VF_ID_VALID        UINT32_C(0x1)
+       uint32_t vnic_id;
+       /* Logical vnic ID */
+       uint16_t vf_id;
+       /* ID of Virtual Function whose VNIC resource is being queried. */
+       uint16_t unused_0[3];
+} __attribute__((packed));
+
+/* Output      (32 bytes) */
+struct hwrm_vnic_qcfg_output {
+       uint16_t error_code;
        /*
-        * When this bit is '1', the RSS hash shall be computed over
-        * source and destination IPv4 addresses of IPv4 packets.
+        * Pass/Fail or error type Note: receiver to verify the in
+        * parameters, and fail the call with an error when appropriate
         */
-       #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4  UINT32_C(0x1)
+       uint16_t req_type;
+       /* This field returns the type of original request. */
+       uint16_t seq_id;
+       /* This field provides original sequence number of the command. */
+       uint16_t resp_len;
        /*
-        * When this bit is '1', the RSS hash shall be computed over
-        * source/destination IPv4 addresses and source/destination
-        * ports of TCP/IPv4 packets.
+        * This field is the length of the response in bytes. The last
+        * byte of the response is a valid flag that will read as '1'
+        * when the command has been completely written to memory.
         */
-       #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4      UINT32_C(0x2)
+       uint16_t dflt_ring_grp;
+       /* Default Completion ring for the VNIC. */
+       uint16_t rss_rule;
        /*
-        * When this bit is '1', the RSS hash shall be computed over
-        * source/destination IPv4 addresses and source/destination
-        * ports of UDP/IPv4 packets.
+        * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if
+        * there is no RSS rule.
         */
-       #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4      UINT32_C(0x4)
+       uint16_t cos_rule;
        /*
-        * When this bit is '1', the RSS hash shall be computed over
-        * source and destination IPv4 addresses of IPv6 packets.
+        * RSS ID for COS rule/table structure. 0xFF... (All Fs) if
+        * there is no COS rule.
         */
-       #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6  UINT32_C(0x8)
+       uint16_t lb_rule;
        /*
-        * When this bit is '1', the RSS hash shall be computed over
-        * source/destination IPv6 addresses and source/destination
-        * ports of TCP/IPv6 packets.
+        * RSS ID for load balancing rule/table structure. 0xFF...      (All
+        * Fs) if there is no LB rule.
         */
-       #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6      UINT32_C(0x10)
-       /*
+       uint16_t mru;
+       /* The maximum receive unit of the vnic. */
+       uint8_t unused_0;
+       uint8_t unused_1;
+       uint32_t flags;
+       /*
+        * When this bit is '1', the VNIC is the default VNIC for the
+        * function.
+        */
+       #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_DEFAULT     UINT32_C(0x1)
+       /*
+        * When this bit is '1', the VNIC is configured to strip VLAN in
+        * the RX path. If set to '0', then VLAN stripping is disabled
+        * on this VNIC.
+        */
+       #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_VLAN_STRIP_MODE     UINT32_C(0x2)
+       /*
+        * When this bit is '1', the VNIC is configured to buffer
+        * receive packets in the hardware until the host posts new
+        * receive buffers. If set to '0', then bd_stall is disabled on
+        * this VNIC.
+        */
+       #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_BD_STALL_MODE       UINT32_C(0x4)
+       /*
+        * When this bit is '1', the VNIC is configured to receive both
+        * RoCE and non-RoCE traffic. If set to '0', then this VNIC is
+        * not configured to operate in dual VNIC mode.
+        */
+       #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
+       /*
+        * When this flag is set to '1', the VNIC is configured to
+        * receive only RoCE traffic. When this flag is set to '0', the
+        * VNIC is not configured to receive only RoCE traffic. If
+        * roce_dual_vnic_mode flag and this flag both are set to '1',
+        * then it is an invalid configuration of the VNIC. The HWRM
+        * should not allow that type of mis-configuration by HWRM
+        * clients.
+        */
+       #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
+       /*
+        * When a VNIC uses one destination ring group for certain
+        * application  (e.g. Receive Flow Steering) where exact match is
+        * used to direct packets to a VNIC with one destination ring
+        * group only, there is no need to configure RSS indirection
+        * table for that VNIC as only one destination ring group is
+        * used. When this bit is set to '1', then the VNIC is enabled
+        * in a mode where RSS is enabled in the VNIC using a RSS
+        * context for computing RSS hash but the RSS indirection table
+        * is not configured.
+        */
+       #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_RSS_DFLT_CR_MODE    UINT32_C(0x20)
+       uint32_t unused_2;
+       uint8_t unused_3;
+       uint8_t unused_4;
+       uint8_t unused_5;
+       uint8_t valid;
+       /*
+        * This field is used in Output records to indicate that the
+        * output is completely written to RAM. This field should be
+        * read as '1' to indicate that the output has been completely
+        * written. When writing a command completion or response to an
+        * internal processor, the order of writes has to be such that
+        * this field is written last.
+        */
+} __attribute__((packed));
+
+/* hwrm_vnic_rss_cfg */
+/* Description: This function is used to enable RSS configuration. */
+/* Input (48 bytes) */
+struct hwrm_vnic_rss_cfg_input {
+       uint16_t req_type;
+       /*
+        * This value indicates what type of request this is. The format
+        * for the rest of the command is determined by this field.
+        */
+       uint16_t cmpl_ring;
+       /*
+        * This value indicates the what completion ring the request
+        * will be optionally completed on. If the value is -1, then no
+        * CR completion will be generated. Any other value must be a
+        * valid CR ring_id value for this function.
+        */
+       uint16_t seq_id;
+       /* This value indicates the command sequence number. */
+       uint16_t target_id;
+       /*
+        * Target ID of this command. 0x0 - 0xFFF8 - Used for function
+        * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
+        * - HWRM
+        */
+       uint64_t resp_addr;
+       /*
+        * This is the host address where the response will be written
+        * when the request is complete. This area must be 16B aligned
+        * and must be cleared to zero before the request is made.
+        */
+       uint32_t hash_type;
+       /*
+        * When this bit is '1', the RSS hash shall be computed over
+        * source and destination IPv4 addresses of IPv4 packets.
+        */
+       #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4  UINT32_C(0x1)
+       /*
+        * When this bit is '1', the RSS hash shall be computed over
+        * source/destination IPv4 addresses and source/destination
+        * ports of TCP/IPv4 packets.
+        */
+       #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4      UINT32_C(0x2)
+       /*
+        * When this bit is '1', the RSS hash shall be computed over
+        * source/destination IPv4 addresses and source/destination
+        * ports of UDP/IPv4 packets.
+        */
+       #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4      UINT32_C(0x4)
+       /*
+        * When this bit is '1', the RSS hash shall be computed over
+        * source and destination IPv4 addresses of IPv6 packets.
+        */
+       #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6  UINT32_C(0x8)
+       /*
+        * When this bit is '1', the RSS hash shall be computed over
+        * source/destination IPv6 addresses and source/destination
+        * ports of TCP/IPv6 packets.
+        */
+       #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6      UINT32_C(0x10)
+       /*
         * When this bit is '1', the RSS hash shall be computed over
         * source/destination IPv6 addresses and source/destination
         * ports of UDP/IPv6 packets.
@@ -4473,8 +5435,296 @@ struct hwrm_vnic_rss_cfg_output {
         */
 } __attribute__((packed));
 
+/* hwrm_vnic_plcmodes_cfg */
+/*
+ * Description: This function can be used to set placement mode configuration 
of
+ * the VNIC.
+ */
+/* Input (40 bytes) */
+
+struct hwrm_vnic_plcmodes_cfg_input {
+       uint16_t req_type;
+       /*
+        * This value indicates what type of request this is. The format for the
+        * rest of the command is determined by this field.
+        */
+       uint16_t cmpl_ring;
+       /*
+        * This value indicates the what completion ring the request will be
+        * optionally completed on. If the value is -1, then no CR completion
+        * will be generated. Any other value must be a valid CR ring_id value
+        * for this function.
+        */
+       uint16_t seq_id;
+       /* This value indicates the command sequence number. */
+       uint16_t target_id;
+       /*
+        * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
+        * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
+        */
+       uint64_t resp_addr;
+       /*
+        * This is the host address where the response will be written when the
+        * request is complete. This area must be 16B aligned and must be
+        * cleared to zero before the request is made.
+        */
+       uint32_t flags;
+       /*
+        * When this bit is '1', the VNIC shall be configured to use regular
+        * placement algorithm. By default, the regular placement algorithm
+        * shall be enabled on the VNIC.
+        */
+       #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_REGULAR_PLACEMENT \
+               UINT32_C(0x1)
+       /*
+        * When this bit is '1', the VNIC shall be configured use the jumbo
+        * placement algorithm.
+        */
+       #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_JUMBO_PLACEMENT \
+               UINT32_C(0x2)
+       /*
+        * When this bit is '1', the VNIC shall be configured to enable Header-
+        * Data split for IPv4 packets according to the following rules: # If
+        * the packet is identified as TCP/IPv4, then the packet is split at the
+        * beginning of the TCP payload. # If the packet is identified as
+        * UDP/IPv4, then the packet is split at the beginning of UDP payload. #
+        * If the packet is identified as non-TCP and non-UDP IPv4 packet, then
+        * the packet is split at the beginning of the upper layer protocol
+        * header carried in the IPv4 packet.
+        */
+       #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_IPV4        UINT32_C(0x4)
+       /*
+        * When this bit is '1', the VNIC shall be configured to enable Header-
+        * Data split for IPv6 packets according to the following rules: # If
+        * the packet is identified as TCP/IPv6, then the packet is split at the
+        * beginning of the TCP payload. # If the packet is identified as
+        * UDP/IPv6, then the packet is split at the beginning of UDP payload. #
+        * If the packet is identified as non-TCP and non-UDP IPv6 packet, then
+        * the packet is split at the beginning of the upper layer protocol
+        * header carried in the IPv6 packet.
+        */
+       #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_IPV6        UINT32_C(0x8)
+       /*
+        * When this bit is '1', the VNIC shall be configured to enable Header-
+        * Data split for FCoE packets at the beginning of FC payload.
+        */
+       #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_FCOE       UINT32_C(0x10)
+       /*
+        * When this bit is '1', the VNIC shall be configured to enable Header-
+        * Data split for RoCE packets at the beginning of RoCE payload (after
+        * BTH/GRH headers).
+        */
+       #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_ROCE       UINT32_C(0x20)
+       uint32_t enables;
+       /*
+        * This bit must be '1' for the jumbo_thresh_valid field to be
+        * configured.
+        */
+       #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_JUMBO_THRESH_VALID \
+               UINT32_C(0x1)
+       /*
+        * This bit must be '1' for the hds_offset_valid field to be configured.
+        */
+       #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_HDS_OFFSET_VALID \
+               UINT32_C(0x2)
+       /*
+        * This bit must be '1' for the hds_threshold_valid field to be
+        * configured.
+        */
+       #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_HDS_THRESHOLD_VALID \
+               UINT32_C(0x4)
+       uint32_t vnic_id;
+       /* Logical vnic ID */
+       uint16_t jumbo_thresh;
+       /*
+        * When jumbo placement algorithm is enabled, this value is used to
+        * determine the threshold for jumbo placement. Packets with length
+        * larger than this value will be placed according to the jumbo
+        * placement algorithm.
+        */
+       uint16_t hds_offset;
+       /*
+        * This value is used to determine the offset into packet buffer where
+        * the split data (payload) will be placed according to one of of HDS
+        * placement algorithm. The lengths of packet buffers provided for split
+        * data shall be larger than this value.
+        */
+       uint16_t hds_threshold;
+       /*
+        * When one of the HDS placement algorithm is enabled, this value is
+        * used to determine the threshold for HDS placement. Packets with
+        * length larger than this value will be placed according to the HDS
+        * placement algorithm. This value shall be in multiple of 4 bytes.
+        */
+       uint16_t unused_0[3];
+} __attribute__((packed));
+
+/* Output (16 bytes) */
+
+struct hwrm_vnic_plcmodes_cfg_output {
+       uint16_t error_code;
+       /*
+        * Pass/Fail or error type Note: receiver to verify the in parameters,
+        * and fail the call with an error when appropriate
+        */
+       uint16_t req_type;
+       /* This field returns the type of original request. */
+       uint16_t seq_id;
+       /* This field provides original sequence number of the command. */
+       uint16_t resp_len;
+       /*
+        * This field is the length of the response in bytes. The last byte of
+        * the response is a valid flag that will read as '1' when the command
+        * has been completely written to memory.
+        */
+       uint32_t unused_0;
+       uint8_t unused_1;
+       uint8_t unused_2;
+       uint8_t unused_3;
+       uint8_t valid;
+       /*
+        * This field is used in Output records to indicate that the output is
+        * completely written to RAM. This field should be read as '1' to
+        * indicate that the output has been completely written. When writing a
+        * command completion or response to an internal processor, the order of
+        * writes has to be such that this field is written last.
+        */
+} __attribute__((packed));
+
+/* hwrm_vnic_plcmodes_qcfg */
+/*
+ * Description: This function can be used to query placement mode configuration
+ * of the VNIC.
+ */
+/* Input (24 bytes) */
+
+struct hwrm_vnic_plcmodes_qcfg_input {
+       uint16_t req_type;
+       /*
+        * This value indicates what type of request this is. The format for the
+        * rest of the command is determined by this field.
+        */
+       uint16_t cmpl_ring;
+       /*
+        * This value indicates the what completion ring the request will be
+        * optionally completed on. If the value is -1, then no CR completion
+        * will be generated. Any other value must be a valid CR ring_id value
+        * for this function.
+        */
+       uint16_t seq_id;
+       /* This value indicates the command sequence number. */
+       uint16_t target_id;
+       /*
+        * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
+        * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
+        */
+       uint64_t resp_addr;
+       /*
+        * This is the host address where the response will be written when the
+        * request is complete. This area must be 16B aligned and must be
+        * cleared to zero before the request is made.
+        */
+       uint32_t vnic_id;
+       /* Logical vnic ID */
+       uint32_t unused_0;
+} __attribute__((packed));
+
+/* Output (24 bytes) */
+
+struct hwrm_vnic_plcmodes_qcfg_output {
+       uint16_t error_code;
+       /*
+        * Pass/Fail or error type Note: receiver to verify the in parameters,
+        * and fail the call with an error when appropriate
+        */
+       uint16_t req_type;
+       /* This field returns the type of original request. */
+       uint16_t seq_id;
+       /* This field provides original sequence number of the command. */
+       uint16_t resp_len;
+       /*
+        * This field is the length of the response in bytes. The last byte of
+        * the response is a valid flag that will read as '1' when the command
+        * has been completely written to memory.
+        */
+       uint32_t flags;
+       /*
+        * When this bit is '1', the VNIC is configured to use regular placement
+        * algorithm.
+        */
+       #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_REGULAR_PLACEMENT \
+               UINT32_C(0x1)
+       /*
+        * When this bit is '1', the VNIC is configured to use the jumbo
+        * placement algorithm.
+        */
+       #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_JUMBO_PLACEMENT \
+               UINT32_C(0x2)
+       /*
+        * When this bit is '1', the VNIC is configured to enable Header-Data
+        * split for IPv4 packets.
+        */
+       #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_IPV4      UINT32_C(0x4)
+       /*
+        * When this bit is '1', the VNIC is configured to enable Header-Data
+        * split for IPv6 packets.
+        */
+       #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_IPV6      UINT32_C(0x8)
+       /*
+        * When this bit is '1', the VNIC is configured to enable Header-Data
+        * split for FCoE packets.
+        */
+       #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_FCOE     UINT32_C(0x10)
+       /*
+        * When this bit is '1', the VNIC is configured to enable Header-Data
+        * split for RoCE packets.
+        */
+       #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_ROCE     UINT32_C(0x20)
+       /*
+        * When this bit is '1', the VNIC is configured to be the default VNIC
+        * of the requesting function.
+        */
+       #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_DFLT_VNIC    UINT32_C(0x40)
+       uint16_t jumbo_thresh;
+       /*
+        * When jumbo placement algorithm is enabled, this value is used to
+        * determine the threshold for jumbo placement. Packets with length
+        * larger than this value will be placed according to the jumbo
+        * placement algorithm.
+        */
+       uint16_t hds_offset;
+       /*
+        * This value is used to determine the offset into packet buffer where
+        * the split data (payload) will be placed according to one of of HDS
+        * placement algorithm. The lengths of packet buffers provided for split
+        * data shall be larger than this value.
+        */
+       uint16_t hds_threshold;
+       /*
+        * When one of the HDS placement algorithm is enabled, this value is
+        * used to determine the threshold for HDS placement. Packets with
+        * length larger than this value will be placed according to the HDS
+        * placement algorithm. This value shall be in multiple of 4 bytes.
+        */
+       uint8_t unused_0;
+       uint8_t unused_1;
+       uint8_t unused_2;
+       uint8_t unused_3;
+       uint8_t unused_4;
+       uint8_t valid;
+       /*
+        * This field is used in Output records to indicate that the output is
+        * completely written to RAM. This field should be read as '1' to
+        * indicate that the output has been completely written. When writing a
+        * command completion or response to an internal processor, the order of
+        * writes has to be such that this field is written last.
+        */
+} __attribute__((packed));
+
 /* hwrm_vnic_rss_cos_lb_ctx_alloc */
-/* Description: This function is used to allocate COS/Load Balance context. */
+/*
+ * Description: This function is used to allocate COS/Load Balance context.
+ */
 /* Input (16 bytes) */
 struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
        uint16_t req_type;
@@ -6040,4 +7290,91 @@ struct hwrm_exec_fwd_resp_output {
         */
 } __attribute__((packed));
 
+/* hwrm_reject_fwd_resp */
+/*
+ * Description: This command is used to send an encapsulated request to the
+ * HWRM. This command instructs the HWRM to reject the request and forward the
+ * error response of the encapsulated request to the location specified in the
+ * original request that is encapsulated. The target id of this command shall 
be
+ * set to 0xFFFF (HWRM). The response location in this command shall be used to
+ * acknowledge the receipt of the encapsulated request and forwarding of the
+ * response.
+ */
+/* Input       (128 bytes) */
+struct hwrm_reject_fwd_resp_input {
+       uint16_t req_type;
+       /*
+        * This value indicates what type of request this is. The format
+        * for the rest of the command is determined by this field.
+        */
+       uint16_t cmpl_ring;
+       /*
+        * This value indicates the what completion ring the request
+        * will be optionally completed on. If the value is -1, then no
+        * CR completion will be generated. Any other value must be a
+        * valid CR ring_id value for this function.
+        */
+       uint16_t seq_id;
+       /* This value indicates the command sequence number. */
+       uint16_t target_id;
+       /*
+        * Target ID of this command. 0x0 - 0xFFF8 - Used for function
+        * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
+        * - HWRM
+        */
+       uint64_t resp_addr;
+       /*
+        * This is the host address where the response will be written
+        * when the request is complete. This area must be 16B aligned
+        * and must be cleared to zero before the request is made.
+        */
+       uint32_t encap_request[26];
+       /*
+        * This is an encapsulated request. This request should be
+        * rejected by the HWRM and the error response should be
+        * provided in the response buffer inside the encapsulated
+        * request.
+        */
+       uint16_t encap_resp_target_id;
+       /*
+        * This value indicates the target id of the response to the
+        * encapsulated request. 0x0 - 0xFFF8 - Used for function ids
+        * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
+        * HWRM
+        */
+       uint16_t unused_0[3];
+} __attribute__((packed));
+
+/* Output      (16 bytes) */
+struct hwrm_reject_fwd_resp_output {
+       uint16_t error_code;
+       /*
+        * Pass/Fail or error type Note: receiver to verify the in
+        * parameters, and fail the call with an error when appropriate
+        */
+       uint16_t req_type;
+       /* This field returns the type of original request. */
+       uint16_t seq_id;
+       /* This field provides original sequence number of the command. */
+       uint16_t resp_len;
+       /*
+        * This field is the length of the response in bytes. The last
+        * byte of the response is a valid flag that will read as '1'
+        * when the command has been completely written to memory.
+        */
+       uint32_t unused_0;
+       uint8_t unused_1;
+       uint8_t unused_2;
+       uint8_t unused_3;
+       uint8_t valid;
+       /*
+        * This field is used in Output records to indicate that the
+        * output is completely written to RAM. This field should be
+        * read as '1' to indicate that the output has been completely
+        * written. When writing a command completion or response to an
+        * internal processor, the order of writes has to be such that
+        * this field is written last.
+        */
+} __attribute__((packed));
+
 #endif
-- 
2.10.1 (Apple Git-78)

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