Hi Kirill, > -----Original Message----- > From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Kirill Rybalchenko > Sent: Friday, September 1, 2017 4:03 PM > To: dev@dpdk.org > Cc: Rybalchenko, Kirill <kirill.rybalche...@intel.com>; Chilikin, Andrey > <andrey.chili...@intel.com>; Xing, Beilei <beilei.x...@intel.com>; Wu, > Jingjing <jingjing...@intel.com> > Subject: [dpdk-dev] [PATCH v2 2/4] net/i40e: add new functions to > manipulate with pctype mapping table > > Add new functions which allow modify, return or reset to default the > contents of flow type to pctype dynamic mapping table. > > Signed-off-by: Kirill Rybalchenko <kirill.rybalche...@intel.com> > --- > drivers/net/i40e/rte_pmd_i40e.c | 98 > +++++++++++++++++++++++++++++++++++++++++ > drivers/net/i40e/rte_pmd_i40e.h | 61 +++++++++++++++++++++++++ > 2 files changed, 159 insertions(+) > > diff --git a/drivers/net/i40e/rte_pmd_i40e.c > b/drivers/net/i40e/rte_pmd_i40e.c index d69a472..3f844e6 100644 > --- a/drivers/net/i40e/rte_pmd_i40e.c > +++ b/drivers/net/i40e/rte_pmd_i40e.c > @@ -2161,3 +2161,101 @@ rte_pmd_i40e_add_vf_mac_addr(uint8_t port, > uint16_t vf_id, > > return 0; > } > + > +int rte_pmd_i40e_flow_type_mapping_reset(uint8_t port) { > + struct rte_eth_dev *dev; > + > + RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV); > + > + dev = &rte_eth_devices[port]; > + > + if (!is_i40e_supported(dev)) > + return -ENOTSUP; > + > + i40e_set_default_pctype_table(dev); > + > + return 0; > +} > + > +int rte_pmd_i40e_flow_type_mapping_get( > + uint8_t port, > + struct rte_pmd_i40e_flow_type_mapping > *mapping_items, > + uint16_t size, > + uint16_t *count, > + uint8_t valid_only) > +{ > + struct rte_eth_dev *dev; > + struct i40e_adapter *ad; > + int n = 0; > + uint16_t i; > + > + RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV); > + > + dev = &rte_eth_devices[port]; > + > + if (!is_i40e_supported(dev)) > + return -ENOTSUP; > + > + ad = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); > + > + for (i = 0; i < I40E_FLOW_TYPE_MAX; i++) { > + if (n >= size) > + break; > + if (valid_only && ad->pcypes_tbl[i] == 0ULL) > + continue; > + mapping_items[n].flow_type = i; > + mapping_items[n].pctype = ad->pcypes_tbl[i]; > + n++; > + } > + > + *count = n; > + return 0; > +} > + > +int > +rte_pmd_i40e_flow_type_mapping_update( > + uint8_t port, > + struct rte_pmd_i40e_flow_type_mapping > *mapping_items, > + uint16_t count, > + uint8_t exclusive) > +{ > + struct rte_eth_dev *dev; > + struct i40e_adapter *ad; > + int i; > + > + RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV); > + > + dev = &rte_eth_devices[port]; > + > + if (!is_i40e_supported(dev)) > + return -ENOTSUP; > + > + if (count > I40E_FLOW_TYPE_MAX) > + return -EINVAL; > + > + for (i = 0; i < count; i++) > + if (mapping_items[i].flow_type >= I40E_FLOW_TYPE_MAX) > + return -EINVAL; > + > + ad = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); > + > + if (exclusive) { > + for (i = 0; i < I40E_FLOW_TYPE_MAX; i++) > + ad->pcypes_tbl[i] = 0ULL; > + ad->flow_types_msk = 0ULL; > + } > + > + for (i = 0; i < count; i++) { > + ad->pcypes_tbl[mapping_items[i].flow_type] = > mapping_items[i].pctype; > + if (mapping_items[i].pctype) > + ad->flow_types_msk |= (1ULL << > mapping_items[i].flow_type); > + else > + ad->flow_types_msk &= ~(1ULL << > mapping_items[i].flow_type); > + } > + > + for (i = 0, ad->pctypes_msk = 0ULL; i < I40E_FLOW_TYPE_MAX; i++) > + ad->pctypes_msk |= ad->pcypes_tbl[i]; > + > + return 0; > +} > diff --git a/drivers/net/i40e/rte_pmd_i40e.h > b/drivers/net/i40e/rte_pmd_i40e.h index 155b7e8..66de588 100644 > --- a/drivers/net/i40e/rte_pmd_i40e.h > +++ b/drivers/net/i40e/rte_pmd_i40e.h > @@ -657,4 +657,65 @@ int rte_pmd_i40e_ptype_mapping_replace(uint8_t > port, int rte_pmd_i40e_add_vf_mac_addr(uint8_t port, uint16_t vf_id, > struct ether_addr *mac_addr); > > + > +struct rte_pmd_i40e_flow_type_mapping { > + uint8_t flow_type; /**< software defined flow type*/ > + uint64_t pctype; /**< hardware defined pctype */ }; > + > +/** > + * Update hardware defined pctype to software defined flow type > + * mapping table. > + * > + * @param port > + * pointer to port identifier of the device. > + * @param mapping_items > + * the base address of the mapping items array. > + * @param count > + * number of mapping items. > + * @param exclusive > + * the flag indicate different ptype mapping update method. > + * -(0) only overwrite referred PTYPE mapping, > + * keep other PTYPEs mapping unchanged. > + * -(!0) overwrite referred PTYPE mapping, > + * set other PTYPEs maps to PTYPE_UNKNOWN. > + */ > +int rte_pmd_i40e_flow_type_mapping_update( > + uint8_t port, > + struct rte_pmd_i40e_flow_type_mapping > *mapping_items, > + uint16_t count, > + uint8_t exclusive); > + > +/** > + * Get software defined flow type to hardware defined pctype > + * mapping items. > + * > + * @param port > + * pointer to port identifier of the device. > + * @param mapping_items > + * the base address of the array to store returned items. > + * @param size > + * the size of the input array. > + * @param count > + * the place to store the number of returned items. > + * @param valid_only > + * -(0) return full mapping table. > + * -(!0) only return mapping items which flow_type != > RTE_ETH_FLOW_UNKNOWN. > + */ > +int rte_pmd_i40e_flow_type_mapping_get( > + uint8_t port, > + struct rte_pmd_i40e_flow_type_mapping > *mapping_items, > + uint16_t size, > + uint16_t *count, > + uint8_t valid_only); > + > +/** > + * Reset hardware defined pctype to software defined flow type > + * mapping table to default. > + * > + * @param port > + * pointer to port identifier of the device > + */ > +int rte_pmd_i40e_flow_type_mapping_reset(uint8_t port); > + > #endif /* _PMD_I40E_H_ */ > -- > 2.5.5
There are 3 checkpatch warnings in rte_pmd_i40e.c file at lines 2250, 2252 and 2254. Regards, Bernard.
