On Tue, Jan 09, 2018 at 03:16:13PM +0000, Rybalchenko, Kirill wrote: > > -----Original Message----- > > From: Adrien Mazarguil [mailto:adrien.mazarg...@6wind.com] > > Sent: Monday 4 December 2017 17:43 > > To: Rybalchenko, Kirill <kirill.rybalche...@intel.com> > > Cc: dev@dpdk.org; Wu, Jingjing <jingjing...@intel.com>; Xing, Beilei > > <beilei.x...@intel.com>; johnd...@cisco.com; neesc...@cisco.com; > > nelio.laranje...@6wind.com; ys...@mellanox.com; Lu, Wenzhuo > > <wenzhuo...@intel.com>; Ananyev, Konstantin > > <konstantin.anan...@intel.com>; Chilikin, Andrey > > <andrey.chili...@intel.com> > > Subject: Re: [PATCH] ethdev: increase flow type limit from 32 to 64 > > > > Hi Kirill, > > > > On Mon, Nov 27, 2017 at 12:29:47PM +0000, Kirill Rybalchenko wrote: > > > Increase the internal limit for flow types from 32 to 64 to support > > > future flow type extensions. > > > Change type of variables from uint32_t[] to uint64_t[]: > > > rte_eth_fdir_info.flow_types_mask > > > rte_eth_hash_global_conf.sym_hash_enable_mask > > > rte_eth_hash_global_conf.valid_bit_mask > > > > > > This modification affects the following components: > > > net/i40e > > > net/enic > > > net/mlx5 > > > net/ixgbe > > > app/testpmd > > > > > > Signed-off-by: Kirill Rybalchenko <kirill.rybalche...@intel.com> > > > > Can you elaborate a bit on the need for these changes? > > Have you considered implementing those future extensions through > > rte_flow instead? > > Hi Adrien, this is not a new feature but rather fix of existing limitation. > In current implementation the symmetric hash mask and flow mask are > represented by 32-bit variable, while hardware bitmask has 64 bits. > Unfortunately, this modification changes ABI of the library as it changes size > of rte_eth_fdir_info structure. All related PMDs (listed above) had to be > modified > accordingly.
OK, no problem with this change. I assume you'll re-submit it since you sent a deprecation notice, we'll review/ack subsequent mlx5 patches. -- Adrien Mazarguil 6WIND