Hello, flushing write buffer (term hashes) to disk is CPU intensive operation, some part of it might be quite easy to move to GPUs (I think it involves sorting). Other important part is encoding postings lists (integers), it has been shown that SIMD instructions can be handy <https://github.com/lemire/SIMDCompressionAndIntersection>for this task - thus I think it can be moved to GPU as well, but decoding probably should stay on CPU.
But acceleration of text analysis seems much harder to me - it probably contains a lot of branching, which is bad for GPU utilization. I'm new to Lucene internals, I might be horribly wrong ) 12 Июл 2016 г. 1:30 пользователь "Beercandyman" <[email protected]> написал: > I’ve been working on writing an indexer that runs in an FPGA. I find FPGAs > have a hard time doing functions that are very easy on a CPU. When I think > about it the same is true of GPUs. I want to propose some kind of > accelerator interface into the indexing code. > > > > Here is a start to a proposal. > > http://bit.ly/29EOSnW > > > > I’m wondering if anyone thinks this idea has merit and if anyone want to > work on it with me? > > > > Cheers > > > > Steve > > > > >
