I'm bringing up support for a new RISC-V core but I'm running into some
issues around the sys tick.
My tick timer interrupt is disabled at activating a task, clearly this is
not correct. This is code used across all architectures so I'm sure I just
do not understand something
void nxtask_activate(FAR struct tcb_s *tcb)
{
irqstate_t flags = enter_critical_section();
up_unblock_task(tcb);
leave_critical_section(flags);
}
Won't we perform a context switch here and not leave the critical section?
No, the critical section is left automatically when the context switch
occurs. The critical section is not a global attribute; it is a per
task attribute. If Task A enters the critical section then suspends (as
above) the state of critical section is saved and the new state of the
critical section for the newly started Task B is instantiated. For a
new task like this, the initial state of the critical section will be
"not-in-a-critical section".
This is described in a Wiki pages somewhere, but I don't recall which.
In know that is mentioned in the Wiki page on the critical section
monitor but I don't think that is the authoritative reference.
So, don't worry. This has all been carefully thought through and has
worked well for 13.3 years.
