Hi, I pushed a cleaned-up working SAMA5 SDMMC driver to this branch:
https://github.com/starcat-io/incubator-nuttx/tree/feature/sama5d27-sdmmc-support It's ported from imxrt_usdhc.c, there were some differences but the structure is largely the same. This driver works with DMA, and can do widebus (4-bit) transfers in UHS_DDR50 mode (double data-rate 50MHz, so one transfer each on the rising and falling of the SD clock); up from the ixmrt's default of UHS_SDR25 (single data rate 25MHz). I haven't run nxstyle on it, I will try to do that this weekend, update the formatting, and get a PR submitted for review. cheers adam On Wed, Jun 17, 2020 at 9:19 PM Adam Feuer <a...@starcat.io> wrote: > Thanks Nathan. It's been interesting learning how to port and debug NuttX > drivers. Hopefully I will be able to write something about it when I get > the code accepted. > > It was helpful that I could port a driver used by the same chip peripheral > IP block on other NuttX supported chips. I didn't have to write it from > scratch. Takeyoshi suggested doing the port and he was right about it. > > -adam > > > On Wed, Jun 17, 2020 at 5:46 PM Nathan Hartman <hartman.nat...@gmail.com> > wrote: > >> On Wed, Jun 17, 2020 at 5:49 PM Adam Feuer <a...@starcat.io> wrote: >> >> > SDMMC write is working now too. So the driver can do the following: >> > >> > - Non-DMA read and write >> > - DMA read and write in SDMA mode >> > - 1 bit bus >> > - 4 bit bus (widebus) >> > - up to 25Mhz >> > >> > I'm going to work on cleanup, documentation, and PR next. I'll post a >> > branch here when I get it somewhat cleaned up. >> >> >> That's exciting! Thanks for your hard work and for posting updates in the >> meantime. >> >> Cheers, >> Nathan >> > > > -- > Adam Feuer <a...@starcat.io> > -- Adam Feuer <a...@starcat.io>
