Hi Mattias,

welcome here on our list. I am sure we'll be able to help you.

Sounds like a great topic to write your thesis on ... really wished I had had 
the luck to do something that cool ;-)

So am I assuming correctly that you're planning on working on the generation of 
the driver logic code? Cause the Parser/Serializer/Model stuff is what we 
already have.

Cause in general we see two parts: Syntax and Semantic ... so on the one side 
we have the syntax of the packets of a given protocol. This is what we have 
with the auto-generated model classes and the Parser and Serializer code. 
However this only is part of what defines a driver. The second half we still 
have to write by hand for every driver: Which messages are sent at which time 
and how to react when receiving the different types of message.

I think when having a look at the files ending on *IT.xml they can give you an 
impression on how this logic should work.
They are part of our testsuite which we use to test the logic. So imagine them 
the counterpart of what would be a generated driver logic. (Some people even 
suggested a generated driver logic could possibly be based on these files as 
they already define great parts of what is expected to happen.

Hope this helps you get started. 

If you have any questions, don't hesitate to ask.

Chris





Am 30.08.20, 21:50 schrieb "Matthias Richter" <[email protected]>:

    Hi all, 

    my name is Matthias and I'm studying mechanical engineering at the 
University of Stuttgart. 
    Currently, I'm doing my bachelor thesis at the "Institute for Control 
Engineering of Machine Tools and Manufacturing Units". 

    The task of my thesis is to define and implement a model for the automatic 
generation of protocol drivers in different programming languages for PLC4X, 
using template-based code generation. 
    My supervisor Matthias Strljic recommended to introduce myself to this 
mailing list to get in contact with the developers of the project and maybe get 
some help with questions that might arise during my thesis. 

    In the repository and the documentation, I have seen that there are already 
different parts of the drivers which are automatically generated.
    Nevertheless, I have some difficulties getting a deeper understanding of 
the current driver generation process. 
    I would be pleased if someone would be willing to give me a rough overview 
of the current status of the project and the approaches used for the driver 
generation.

    Regards Mattias

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