Reviewed-by: Eric Dong <eric.d...@intel.com> > -----Original Message----- > From: Ni, Ray > Sent: Wednesday, July 3, 2019 2:54 PM > To: devel@edk2.groups.io > Cc: Dong, Eric <eric.d...@intel.com>; Laszlo Ersek <ler...@redhat.com> > Subject: [PATCH v2 2/3] MdePkg/BaseLib.h: Update IA32_CR4 structure for > 5-level paging > > 5-level paging is documented in white paper: > https://software.intel.com/sites/default/files/managed/2b/80/5- > level_paging_white_paper.pdf > > Commit f8113e25001e715390127f23e2197252cbd6d1a2 > changed Cpuid.h already. > > This patch updates IA32_CR4 structure to include LA57 field. > > Signed-off-by: Ray Ni <ray...@intel.com> > Cc: Eric Dong <eric.d...@intel.com> > Regression-tested-by: Laszlo Ersek <ler...@redhat.com> > --- > MdePkg/Include/Library/BaseLib.h | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/MdePkg/Include/Library/BaseLib.h > b/MdePkg/Include/Library/BaseLib.h > index ebd7dd274c..a22bfc9fad 100644 > --- a/MdePkg/Include/Library/BaseLib.h > +++ b/MdePkg/Include/Library/BaseLib.h > @@ -5324,7 +5324,8 @@ typedef union { > UINT32 OSXMMEXCPT:1; ///< Operating System Support for > ///< Unmasked SIMD Floating Point > ///< Exceptions. > - UINT32 Reserved_0:2; ///< Reserved. > + UINT32 Reserved_2:1; ///< Reserved. > + UINT32 LA57:1; ///< Linear Address 57bit. > UINT32 VMXE:1; ///< VMX Enable > UINT32 Reserved_1:18; ///< Reserved. > } Bits; > -- > 2.21.0.windows.1
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