On 8/21/19 9:21 AM, Laszlo Ersek wrote: > On 08/19/19 23:35, Lendacky, Thomas wrote: >> From: Tom Lendacky <thomas.lenda...@amd.com> >> >> Currently, the OVMF code relies on the hypervisor to enable the cache >> support on the processor in order to improve the boot speed. However, >> with SEV-ES, the hypervisor is not allowed to change the CR0 register >> to enable caching. >> >> Update the OVMF Sec support to enable caching in order to improve the >> boot speed. >> >> Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com> >> --- >> OvmfPkg/Sec/SecMain.c | 5 +++++ >> 1 file changed, 5 insertions(+) >> >> diff --git a/OvmfPkg/Sec/SecMain.c b/OvmfPkg/Sec/SecMain.c >> index 3914355cd17b..2448be0cd408 100644 >> --- a/OvmfPkg/Sec/SecMain.c >> +++ b/OvmfPkg/Sec/SecMain.c >> @@ -739,6 +739,11 @@ SecCoreStartupWithStack ( >> >> ProcessLibraryConstructorList (NULL, NULL); >> >> + // >> + // Enable caching >> + // >> + AsmEnableCache (); >> + >> DEBUG ((EFI_D_INFO, >> "SecCoreStartupWithStack(0x%x, 0x%x)\n", >> (UINT32)(UINTN)BootFv, >> > > This makes me uncomfortable. There used to be problems related to > caching when VFIO device assignment were used. My concern is admittedly > vague, but this is a very brittle area of OVMF-on-KVM. If you asked me > "well what could break here", I'd answer "you never know, and the burden > of proof is not on me". :) Can we make this change conditional on SEV-ES? >
I'll look into that. Anything is possible, just might have to read an MSR at this stage. Thanks, Tom > Thanks > Laszlo > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#46178): https://edk2.groups.io/g/devel/message/46178 Mute This Topic: https://groups.io/mt/32966275/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-